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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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1
EP3608962A1
MESA TRENCH ETCH WITH STACKED SIDEWALL PASSIVATION
Publication/Patent Number: EP3608962A1 Publication Date: 2020-02-12 Application Number: 19189836.0 Filing Date: 2019-08-02 Inventor: Zhang, Wei   Evans, Michael J.   Malchow, Douglas Stewart   Bereznycky paul l   Paik, Namwoong   Assignee: Sensors Unlimited, Inc.   IPC: H01L27/146 Abstract: A method of forming an array of photodiodes includes forming a cap layer (102) on a surface (104) of an absorption layer (106). The method includes forming a plurality of spaced apart pixel diffusion areas (116) in the cap layer (102). The method includes forming a mesa trench (124) with opposed sidewalls (126) through the cap layer (102), wherein the mesa trench (124) surrounds each of the pixel diffusion areas (116) separating the pixel diffusion areas (116) from one another. The method includes forming a sidewall passivation layer (128) over the sidewalls (126) of the mesa trench (124) and removing a portion of the sidewall passivation layer (128) to expose a respective contact (118) electrically connected to each of the pixel diffusion areas (116), but leaving the sidewalls (126) of the mesa trench covered with the sidewall passivation layer (128) wherein the contact (118) is open and uncovered for electrical connection.
2
US2020052012A1
MESA TRENCH ETCH WITH STACKED SIDEWALL PASSIVATION
Publication/Patent Number: US2020052012A1 Publication Date: 2020-02-13 Application Number: 16/057,191 Filing Date: 2018-08-07 Inventor: Zhang, Wei   Evans, Michael J.   Malchow, Douglas Stewart   Bereznycky paul l   Paik, Namwoong   Assignee: Sensors Unlimited, Inc.   IPC: H01L27/146 Abstract: A method of forming an array of photodiodes includes forming a cap layer on a surface of an absorption layer. The method includes forming a plurality of spaced apart pixel diffusion areas in the cap layer. The method includes forming a mesa trench with opposed sidewalls through the cap layer, wherein the mesa trench surrounds each of the pixel diffusion areas separating the pixel diffusion areas from one another. The method includes forming a sidewall passivation layer over the sidewalls of the mesa trench and removing a portion of the sidewall passivation layer to expose a respective contact electrically connected to each of the pixel diffusion areas, but leaving the sidewalls of the mesa trench covered with the sidewall passivation layer wherein the contact is open and uncovered for electrical connection.
3
US202052012A1
MESA TRENCH ETCH WITH STACKED SIDEWALL PASSIVATION
Publication/Patent Number: US202052012A1 Publication Date: 2020-02-13 Application Number: 20/181,605 Filing Date: 2018-08-07 Inventor: Zhang, Wei   Malchow, Douglas Stewart   Evans, Michael J.   Paik, Namwoong   Bereznycky paul l   Assignee: Sensors Unlimited, Inc.   IPC: H01L27/146 Abstract: A method of forming an array of photodiodes includes forming a cap layer on a surface of an absorption layer. The method includes forming a plurality of spaced apart pixel diffusion areas in the cap layer. The method includes forming a mesa trench with opposed sidewalls through the cap layer, wherein the mesa trench surrounds each of the pixel diffusion areas separating the pixel diffusion areas from one another. The method includes forming a sidewall passivation layer over the sidewalls of the mesa trench and removing a portion of the sidewall passivation layer to expose a respective contact electrically connected to each of the pixel diffusion areas, but leaving the sidewalls of the mesa trench covered with the sidewall passivation layer wherein the contact is open and uncovered for electrical connection.
4
US2020083272A1
INTERCONNECT BUMP STRUCTURES FOR PHOTO DETECTORS
Publication/Patent Number: US2020083272A1 Publication Date: 2020-03-12 Application Number: 16/129,402 Filing Date: 2018-09-12 Inventor: Zhang, Wei   Malchow, Douglas Stewart   Evans, Michael J.   Huang, Wei   Bereznycky paul l   Paik, Namwoong   Assignee: Sensors Unlimited, Inc.   IPC: H01L27/146 Abstract: A method of assembling a photodetector assembly includes depositing bumps on a read out integrated circuit (ROIC) without depositing bumps on a photodiode array (PDA). The method includes assembling the PDA and ROIC together wherein each bump electrically interconnects the ROIC with a respective contact of the PDA. A photodetector assembly includes a PDA. A ROIC is assembled to the PDA, wherein the ROIC is electrically interconnected with the PDA through a plurality of electrically conductive bumps. Each bump is confined within a respective pocket between the ROIC and a respective contact of the PDA. The disclosed methods can enable focal plane array manufacturers to achieve low-cost production of ultra-fine pitch, large format imaging arrays.
5
US10727267B2
Interconnect bump structures for photo detectors
Publication/Patent Number: US10727267B2 Publication Date: 2020-07-28 Application Number: 16/129,402 Filing Date: 2018-09-12 Inventor: Zhang, Wei   Malchow, Douglas Stewart   Evans, Michael J.   Huang, Wei   Bereznycky paul l   Paik, Namwoong   Assignee: Sensors Unlimited, Inc.   IPC: H01L27/146 Abstract: A method of assembling a photodetector assembly includes depositing bumps on a read out integrated circuit (ROIC) without depositing bumps on a photodiode array (PDA). The method includes assembling the PDA and ROIC together wherein each bump electrically interconnects the ROIC with a respective contact of the PDA. A photodetector assembly includes a PDA. A ROIC is assembled to the PDA, wherein the ROIC is electrically interconnected with the PDA through a plurality of electrically conductive bumps. Each bump is confined within a respective pocket between the ROIC and a respective contact of the PDA. The disclosed methods can enable focal plane array manufacturers to achieve low-cost production of ultra-fine pitch, large format imaging arrays.
6
US2020312900A1
INTERCONNECT BUMP STRUCTURES FOR PHOTO DETECTORS
Publication/Patent Number: US2020312900A1 Publication Date: 2020-10-01 Application Number: 16/902,318 Filing Date: 2020-06-16 Inventor: Zhang, Wei   Malchow, Douglas Stewart   Evans, Michael J.   Huang, Wei   Bereznycky paul l   Paik, Namwoong   Assignee: Sensors Unlimited, Inc.   IPC: H01L27/146 Abstract: A method of assembling a photodetector assembly includes depositing bumps on a read out integrated circuit (ROIC) without depositing bumps on a photodiode array (PDA). The method includes assembling the PDA and ROIC together wherein each bump electrically interconnects the ROIC with a respective contact of the PDA. A photodetector assembly includes a PDA. A ROIC is assembled to the PDA, wherein the ROIC is electrically interconnected with the PDA through a plurality of electrically conductive bumps. Each bump is confined within a respective pocket between the ROIC and a respective contact of the PDA. The disclosed methods can enable focal plane array manufacturers to achieve low-cost production of ultra-fine pitch, large format imaging arrays.
7
EP3624191A1
INTERCONNECT BUMP STRUCTURES FOR PHOTO DETECTORS
Publication/Patent Number: EP3624191A1 Publication Date: 2020-03-18 Application Number: 19197065.6 Filing Date: 2019-09-12 Inventor: Zhang, Wei   Malchow, Douglas Stewart   Evans, Michael J.   Huang, Wei   Bereznycky paul l   Paik, Namwoong   Assignee: Sensors Unlimited, Inc.   IPC: H01L27/146 Abstract: A method of assembling a photodetector assembly includes depositing bumps on a read out integrated circuit (ROIC) without depositing bumps on a photodiode array (PDA). The method includes assembling the PDA and ROIC together wherein each bump electrically interconnects the ROIC with a respective contact of the PDA. A photodetector assembly includes a PDA. A ROIC is assembled to the PDA, wherein the ROIC is electrically interconnected with the PDA through a plurality of electrically conductive bumps. Each bump is confined within a respective pocket between the ROIC and a respective contact of the PDA. The disclosed methods can enable focal plane array manufacturers to achieve low-cost production of ultra-fine pitch, large format imaging arrays.