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1 | US10963713B2 |
Electronic device and biological monitoring method using the same
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Publication/Patent Number: US10963713B2 | Publication Date: 2021-03-30 | Application Number: 16/158,289 | Filing Date: 2018-10-11 | Inventor： Shen, Chih-teng Chang cheng wei | Assignee: Wistron Corporation | IPC: G06K9/00 | Abstract: An electronic device is disclosed. The electronic device includes a wireless module configured to emit a first radar signal and receive a second radar signal, which is the first radar signal reflected by a user; a gravity sensor configured to sense a status of the electronic device to generate a sensing result; and a control unit coupled to the wireless module and the gravity sensor, and configured to control the wireless module to emit the first radar signal when the sensing result conforms to an emitting condition and determine a physiological status of the user according to the second radar signal received by the wireless module. | |||
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2 | US10915147B2 |
Portable electronic device and method of controlling an image of a display module
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Publication/Patent Number: US10915147B2 | Publication Date: 2021-02-09 | Application Number: 16/197,286 | Filing Date: 2018-11-20 | Inventor： Liang, Chen Yi Yang, Keng-hsien Ho, Hsin Ting Chang cheng wei Liao, Fang-wen | Assignee: WISTRON CORP. | IPC: G06F1/16 | Abstract: A portable electronic device is provided and includes a first display module, a second display module, a keyboard device, a sensing unit and a control unit. The second display module is pivotally connected to the first display module. The sensing unit is configured to sense a position of the keyboard device relative to the second display module to output a sensing signal. The control unit is configured to control a displaying image of the second display module according to the sensing signal. | |||
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3 | US2021013033A1 |
Conductive Feature Formation and Structure
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Publication/Patent Number: US2021013033A1 | Publication Date: 2021-01-14 | Application Number: 17/036,734 | Filing Date: 2020-09-29 | Inventor： Chang cheng wei Hung, Min-hsiu Huang, Hung-yi Wang, Chun Chieh Lin, Yu-ting | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/02 | Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process. | |||
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4 | US2021098366A1 |
MIDDLE-OF-LINE INTERCONNECT STRUCTURE AND MANUFACTURING METHOD
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Publication/Patent Number: US2021098366A1 | Publication Date: 2021-04-01 | Application Number: 16/844,133 | Filing Date: 2020-04-09 | Inventor： Chang cheng wei Wang, Sung-li Liu, Yi-ying Chu, Chia-hung Lee, Fang-wei | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L23/522 | Abstract: In some embodiments, the present disclosure relates to an integrated circuit device. A transistor structure includes a gate electrode separated from a substrate by a gate dielectric and a pair of source/drain regions disposed within the substrate on opposite sides of the gate electrode. A lower conductive plug is disposed through a lower inter-layer dielectric (ILD) layer and contacting a first source/drain region. A capping layer is disposed directly on the lower conductive plug. An upper inter-layer dielectric (ILD) layer is disposed over the capping layer and the lower ILD layer. An upper conductive plug is disposed through the upper ILD layer and directly on the capping layer. | |||
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5 | US2020012874A1 |
ELECTRONIC DEVICE AND BIOLOGICAL MONITORING METHOD USING THE SAME
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Publication/Patent Number: US2020012874A1 | Publication Date: 2020-01-09 | Application Number: 16/158,289 | Filing Date: 2018-10-11 | Inventor： Shen, Chih-teng Chang cheng wei | Assignee: Wistron Corporation | IPC: G06K9/00 | Abstract: An electronic device is disclosed. The electronic device includes a wireless module configured to emit a first radar signal and receive a second radar signal, which is the first radar signal reflected by a user; a gravity sensor configured to sense a status of the electronic device to generate a sensing result; and a control unit coupled to the wireless module and the gravity sensor, and configured to control the wireless module to emit the first radar signal when the sensing result conforms to an emitting condition and determine a physiological status of the user according to the second radar signal received by the wireless module. | |||
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6 | US10741915B2 |
Antenna structure and mobile device
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Publication/Patent Number: US10741915B2 | Publication Date: 2020-08-11 | Application Number: 16/278,340 | Filing Date: 2019-02-18 | Inventor： Chen, Wei-chen Chang cheng wei | Assignee: WISTRON NEWEB CORP. | IPC: H01Q1/24 | Abstract: An antenna structure includes a metal mechanism element, a ground element, a feeding radiation element, a coupling element, a dielectric substrate, and a switchable circuit. The metal mechanism element has a slot. The feeding radiation element extends across the slot. A coupling gap is formed between the feeding radiation element and the coupling element. The feeding radiation element and the coupling element are disposed on the dielectric substrate. The switchable circuit includes a first metal element, a second metal element, a reactance element, a capacitor, and a diode. The first metal element is coupled to the coupling element. The reactance element is embedded in the first metal element. The second metal element is coupled through the capacitor to the ground element. The diode is coupled between the first metal element and the second metal element. The diode is turned on or off according to the control voltage difference. | |||
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7 | US202012874A1 |
ELECTRONIC DEVICE AND BIOLOGICAL MONITORING METHOD USING THE SAME
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Publication/Patent Number: US202012874A1 | Publication Date: 2020-01-09 | Application Number: 20/181,615 | Filing Date: 2018-10-11 | Inventor： Chang cheng wei Shen, Chih-teng | Assignee: Wistron Corporation | IPC: G06K9/00 | Abstract: An electronic device is disclosed. The electronic device includes a wireless module configured to emit a first radar signal and receive a second radar signal, which is the first radar signal reflected by a user; a gravity sensor configured to sense a status of the electronic device to generate a sensing result; and a control unit coupled to the wireless module and the gravity sensor, and configured to control the wireless module to emit the first radar signal when the sensing result conforms to an emitting condition and determine a physiological status of the user according to the second radar signal received by the wireless module. | |||
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8 | EP3590419A1 |
ELECTRONIC DEVICE AND BIOLOGICAL MONITORING METHOD USING THE SAME
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Publication/Patent Number: EP3590419A1 | Publication Date: 2020-01-08 | Application Number: 18204073.3 | Filing Date: 2018-11-02 | Inventor： Shen, Chih-teng Chang cheng wei | Assignee: Wistron Corporation | IPC: A61B5/00 | Abstract: An electronic device (104) includes a wireless module (106) configured to emit a first radar signal (R1) and receive a second radar signal (R2), which is the first radar signal (R1) reflected by a user; a gravity sensor (110) configured to sense a status of the electronic device (104) to generate a sensing result (SR); and a control unit (108) coupled to the wireless module (106) and the gravity sensor (110), and configured to control the wireless module (106) to emit the first radar signal (R1) when the sensing result (SR) conforms to an emitting condition and determine a physiological status of the user according to the second radar signal (R2) received by the wireless module (106). | |||
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9 | US2020185831A1 |
ANTENNA STRUCTURE AND MOBILE DEVICE
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Publication/Patent Number: US2020185831A1 | Publication Date: 2020-06-11 | Application Number: 16/278,340 | Filing Date: 2019-02-18 | Inventor： Chen, Wei-chen Chang cheng wei | Assignee: Wistron NeWeb Corp. | IPC: H01Q5/328 | Abstract: An antenna structure includes a metal mechanism element, a ground element, a feeding radiation element, a coupling element, a dielectric substrate, and a switchable circuit. The metal mechanism element has a slot. The feeding radiation element extends across the slot. A coupling gap is formed between the feeding radiation element and the coupling element. The feeding radiation element and the coupling element are disposed on the dielectric substrate. The switchable circuit includes a first metal element, a second metal element, a reactance element, a capacitor, and a diode. The first metal element is coupled to the coupling element. The reactance element is embedded in the first metal element. The second metal element is coupled through the capacitor to the ground element. The diode is coupled between the first metal element and the second metal element. The diode is turned on or off according to the control voltage difference. | |||
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10 | US2020006058A1 |
Conductive Feature Formation and Structure
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Publication/Patent Number: US2020006058A1 | Publication Date: 2020-01-02 | Application Number: 16/568,720 | Filing Date: 2019-09-12 | Inventor： Chang cheng wei Hung, Min-hsiu Huang, Huang-yi Wang, Chun-chieh Lin, Yu-ting | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/02 | Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process. | |||
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11 | EP3614230A1 |
PORTABLE ELECTRONIC DEVICE AND METHOD OF CONTROLLING AN IMAGE OF A DISPLAY MODULE
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Publication/Patent Number: EP3614230A1 | Publication Date: 2020-02-26 | Application Number: 19152084.0 | Filing Date: 2019-01-16 | Inventor： Liang, Chen Yi Yang, Keng-hsien Ho, Hsin Ting Chang cheng wei Liao, Fang-wen | Assignee: Wistron Corporation | IPC: G06F1/16 | Abstract: A portable electronic device (100) is provided and includes a first display module (102), a second display module (104), a keyboard device (106), a sensing unit (108) and a control unit (110). The second display module (104) is pivotally connected to the first display module (102). The sensing unit (108) is configured to sense a position of the keyboard device (106) relative to the second display module (104) to output a sensing signal. The control unit (110) is configured to control a displaying image of the second display module (104) according to the sensing signal. | |||
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12 | US202006058A1 |
Conductive Feature Formation and Structure
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Publication/Patent Number: US202006058A1 | Publication Date: 2020-01-02 | Application Number: 20/191,656 | Filing Date: 2019-09-12 | Inventor： Wang, Chun-chieh Lin, Yu-ting Chang cheng wei Huang, Huang-yi Hung, Min-hsiu | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L23/532 | Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process. | |||
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13 | US10714334B2 |
Conductive feature formation and structure
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Publication/Patent Number: US10714334B2 | Publication Date: 2020-07-14 | Application Number: 15/860,354 | Filing Date: 2018-01-02 | Inventor： Chang cheng wei Huang, Huang-yi Wang, Chun-chieh Lin, Yu-ting Hung, Min-hsiu | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/762 | Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process. | |||
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14 | US2020064889A1 |
PORTABLE ELECTRONIC DEVICE AND METHOD OF CONTROLLING AN IMAGE OF A DISPLAY MODULE
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Publication/Patent Number: US2020064889A1 | Publication Date: 2020-02-27 | Application Number: 16/197,286 | Filing Date: 2018-11-20 | Inventor： Liang, Chen Yi Yang, Keng-hsien Ho, Hsin Ting Chang cheng wei Liao, Fang-wen | Assignee: Wistron Corp. | IPC: G06F1/16 | Abstract: A portable electronic device is provided and includes a first display module, a second display module, a keyboard device, a sensing unit and a control unit. The second display module is pivotally connected to the first display module. The sensing unit is configured to sense a position of the keyboard device relative to the second display module to output a sensing signal. The control unit is configured to control a displaying image of the second display module according to the sensing signal. | |||
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15 | US10804097B2 |
Conductive feature formation and structure
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Publication/Patent Number: US10804097B2 | Publication Date: 2020-10-13 | Application Number: 16/568,720 | Filing Date: 2019-09-12 | Inventor： Chang cheng wei Hung, Min-hsiu Huang, Hung-yi Wang, Chun Chieh Lin, Yu-ting | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/02 | Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process. | |||
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16 | US2020161412A1 |
TILED DEVICE AND ELECTRONIC DEVICE
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Publication/Patent Number: US2020161412A1 | Publication Date: 2020-05-21 | Application Number: 16/656,537 | Filing Date: 2019-10-17 | Inventor： Lin, Ya-wen Chen, Chien-chih Tu, Yen-hsi Chang cheng wei Yang, Shu-hui | Assignee: InnoLux Corporation | IPC: H01L27/32 | Abstract: An electronic device includes a flexible substrate and a conductive wire. The flexible substrate includes a first bending region and a side region connected to the first bending region. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. A ratio of a total width of the metal portion disposed in the first bending region to a total width of the metal portion disposed in the side region is in a range from 0.8 to 1.2, and a length of one of the openings in the first bending region is less than or equal to a length of one of the openings in the side region. | |||
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17 | EP3654320A1 |
TILED DEVICE AND ELECTRONIC DEVICE
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Publication/Patent Number: EP3654320A1 | Publication Date: 2020-05-20 | Application Number: 19208485.3 | Filing Date: 2019-11-12 | Inventor： Lin, Ya-wen Chen, Chien-chih Tu, Yen-hsi Chang cheng wei Yang, Shu-hui | Assignee: InnoLux Corporation | IPC: G09F9/302 | Abstract: An electronic device (10) includes a flexible substrate (100) and a conductive wire (106, 106a, 106b). The flexible substrate (100) includes a first bending region (100b) and a side region (100c) connected to the first bending region (100b). The conductive wire (106, 106a, 106b) is disposed on the flexible substrate (100) and includes a metal portion (120) and a plurality of openings (122, 1220, 1222, 1224, 1226) disposed in the metal portion (120). A ratio of a total width of the metal portion (120) disposed in the first bending region (100b) to a total width of the metal portion (120) disposed in the side region (100c) is in a range from 0.8 to 1.2, and a length (H0) of one of the openings (1222) in the first bending region (100b) is less than or equal to a length (HI) of one of the openings (1220) in the side region (100c). | |||
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18 | US2020402859A1 |
Contact Structure and Method of Fabricating the Same
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Publication/Patent Number: US2020402859A1 | Publication Date: 2020-12-24 | Application Number: 17/010,995 | Filing Date: 2020-09-03 | Inventor： Hsu, Wan Hsuan Wang, I-hsiu Chen, Yean-zhaw Chang cheng wei Wang, Yu Shih Lu, Hsin-yan Chiu, Yi-wei | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/8234 | Abstract: An apparatus includes a first source and a common drain and on opposite sides of a first gate surrounded by a first gate spacer, a second source and the common drain on opposite sides of a second gate surrounded by a second gate spacer, a first protection layer formed along a sidewall of the first gate spacer, wherein a top surface of the first protection layer has a first slope, a second protection layer formed along a sidewall of the second gate spacer, wherein a top surface of the second protection layer has a second slope, a lower drain contact between the first gate and the second gate and an upper drain contact over the lower drain contact and between the first gate and the second gate, wherein at least a portion of the upper drain contact is in contact with the first slope and the second slope. | |||
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19 | US10770356B2 |
Contact structure and method of fabricating the same
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Publication/Patent Number: US10770356B2 | Publication Date: 2020-09-08 | Application Number: 16/016,962 | Filing Date: 2018-06-25 | Inventor： Hsu, Wan Hsuan Wang, I-hsiu Chen, Yean-zhaw Chang cheng wei Wang, Yu Shih Lu, Hsin-yan Chiu, Yi-wei | Assignee: Taiwan Semiconductor Manufacturing Company, Ltd. | IPC: H01L21/8234 | Abstract: An apparatus includes a first source and a common drain and on opposite sides of a first gate surrounded by a first gate spacer, a second source and the common drain on opposite sides of a second gate surrounded by a second gate spacer, a first protection layer formed along a sidewall of the first gate spacer, wherein a top surface of the first protection layer has a first slope, a second protection layer formed along a sidewall of the second gate spacer, wherein a top surface of the second protection layer has a second slope, a lower drain contact between the first gate and the second gate and an upper drain contact over the lower drain contact and between the first gate and the second gate, wherein at least a portion of the upper drain contact is in contact with the first slope and the second slope. | |||
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20 | US10685842B2 |
Selective formation of titanium silicide and titanium nitride by hydrogen gas control
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Publication/Patent Number: US10685842B2 | Publication Date: 2020-06-16 | Application Number: 15/983,216 | Filing Date: 2018-05-18 | Inventor： Chang cheng wei Lin, Kao-feng Hung, Min-hsiu Chao, Yi-hsiang Huang, Huang-yi Lin, Yu-ting | Assignee: Taiwan Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/285 | Abstract: The present disclosure relates to a method for fabricating a semiconductor structure. The method includes providing a substrate with a gate structure, an insulating structure over the gate structure, and a S/D region; depositing a titanium silicide layer over the S/D region with a first chemical vapor deposition (CVD) process. The first CVD process includes a first hydrogen gas flow. The method also includes depositing a titanium nitride layer over the insulating structure with a second CVD process. The second CVD process includes a second hydrogen gas flow. The first and second CVD processes are performed in a single reaction chamber and a flow rate of the first hydrogen gas flow is higher than a flow rate of the second hydrogen gas flow. |
3.Current Quota