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1
US10833655B2
Driver chip and driving method of a half bridge circuit
Publication/Patent Number: US10833655B2 Publication Date: 2020-11-10 Application Number: 16/047,405 Filing Date: 2018-07-27 Inventor: Chang yu chi   Assignee: Nuvoton Technology Corporation   IPC: H03K3/00 Abstract: A driver chip includes a high side input terminal, a pulse generator, a level shift, a current detector, a high side output controller, and a high side output terminal. The high side input terminal receives the high side input signal and the pulse generator transfers the high side input signal into the rise pulse signal and the fall pulse signal. The current detector detects the first current and the second current flowing through the level shift, and the high side output controller generates the high side output signal. The high side output terminal controls the switching of the high side transistor by the high side output signal.
2
US202035802A1
SEMICONDUCTOR STRUCTURE AND ASSOCIATED MANUFACTURING METHOD
Publication/Patent Number: US202035802A1 Publication Date: 2020-01-30 Application Number: 20/191,636 Filing Date: 2019-03-29 Inventor: Cheng, Hsin-li   Chang yu chi   Assignee: Taiwan Semiconductor Manufacturing Company Ltd.   IPC: H01L29/66 Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active area including a channel region sandwiched between two source/drain regions; an insulation region surrounding the active area from a top view; and a dielectric layer disposed over and in contact with an interface between the insulation region and the source/drain regions. A method of manufacturing the same is also disclosed.
3
US2020035802A1
SEMICONDUCTOR STRUCTURE AND ASSOCIATED MANUFACTURING METHOD
Publication/Patent Number: US2020035802A1 Publication Date: 2020-01-30 Application Number: 16/368,860 Filing Date: 2019-03-29 Inventor: Cheng, Hsin-li   Chang yu chi   Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.   IPC: H01L29/45 Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate; an active area including a channel region sandwiched between two source/drain regions; an insulation region surrounding the active area from a top view; and a dielectric layer disposed over and in contact with an interface between the insulation region and the source/drain regions. A method of manufacturing the same is also disclosed.
4
US10537897B2
Grinding machine and a slight gyration module
Publication/Patent Number: US10537897B2 Publication Date: 2020-01-21 Application Number: 15/378,419 Filing Date: 2016-12-14 Inventor: Tsao, Jia-huey   Yang, Show-ying   Chang yu chi   Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   IPC: B02C19/00 Abstract: A grinding machine includes a slight gyration module for driving a homogeneous container to undergo an X-axial motion and a Y-axial motion within ±1-3 mm distance, a homogeneous-stick rotation module for rotating a homogeneous stick in the homogeneous container so as to generate an eccentric motion between the homogeneous stick and the homogeneous container, and a homogeneous-stick vertical movement module for vertically moving the homogeneous stick with respect to the homogeneous container. When the homogeneous stick is lowered into the homogeneous container by the homogeneous-stick vertical movement module, an eccentric motion with a 1-3 mm radius of gyration can be activated between the homogeneous container and the homogeneous stick so as to carry out the grinding in a tiny slim space between the homogeneous container and the homogeneous stick; such that the grinding efficiency of the grinding machine can be substantially enhanced.
5
US2020144389A1
SEMICONDUCTOR DEVICE WITH REDUCED FLICKER NOISE
Publication/Patent Number: US2020144389A1 Publication Date: 2020-05-07 Application Number: 16/732,397 Filing Date: 2020-01-02 Inventor: Cheng, Hsin-li   Kuo, Liang-tai   Chang yu chi   Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.   IPC: H01L29/51 Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a source region and a drain region arranged in a semiconductor substrate, where the source region is laterally separated from the drain region. A gate stack is arranged over the semiconductor substrate and between the source region and the drain region. A cap layer is arranged over the gate stack, where a bottom surface of the cap layer contacts a top surface of the gate stack. Sidewall spacers are arranged along sides of the gate stack and the cap layer. A resist protective oxide (RPO) layer is disposed over the cap layer, where the RPO layer extends along sides of the sidewalls spacers to the semiconductor substrate. A contact etch stop layer is arranged over the RPO layer, the source region, and the drain region.
6
US10529818B1
Semiconductor device with reduced flicker noise
Publication/Patent Number: US10529818B1 Publication Date: 2020-01-07 Application Number: 16/117,166 Filing Date: 2018-08-30 Inventor: Cheng, Hsin-li   Kuo, Liang-tai   Chang yu chi   Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.   IPC: H01L21/8234 Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a source region and a drain region arranged in a semiconductor substrate, where the source region is laterally separated from the drain region. A gate stack is arranged over the semiconductor substrate and between the source region and the drain region. A cap layer is arranged over the gate stack, where a bottom surface of the cap layer contacts a top surface of the gate stack. Sidewall spacers are arranged along sides of the gate stack and the cap layer. A resist protective oxide (RPO) layer is disposed over the cap layer, where the RPO layer extends along sides of the sidewalls spacers to the semiconductor substrate. A contact etch stop layer is arranged over the RPO layer, the source region, and the drain region.
7
US10573713B2
High voltage junction terminating structure of high voltage integrated circuit
Publication/Patent Number: US10573713B2 Publication Date: 2020-02-25 Application Number: 15/856,096 Filing Date: 2017-12-28 Inventor: Wen, Wen-ying   Siddiqui, Md Imran   Chang yu chi   Assignee: Nuvoton Technology Corporation   IPC: H01L21/761 Abstract: A HVJT structure of HVIC includes P-type substrate. Epitaxial layer is formed on the substrate. N-type doped structure is formed in the epitaxial layer, contacting with the substrate. P-type doped structure is in the N-type doped structure connecting with anode. The substrate, the N-type doped structure and the P-type doped structure form a PNP path along a perpendicular direction to the substrate, wherein NP provide bootstrap diode function and surround the high-side circuit at a horizontal direction. N-type cathode structure is in the epitaxial layer. N-type epitaxial doped region contacts with the substrate, between the PNP path and the N-type cathode structure, also surrounding the high-side circuit. Gate structure is over the N-type epitaxial doped region, between the P-type doped structure and N-type cathode structure. P-type base doped structure is in the epitaxial layer adjacent to the N-type doped structure, to provide a substrate voltage to the substrate.
8
US2020035806A1
SEMICONDUCTOR DEVICE WITH REDUCED FLICKER NOISE
Publication/Patent Number: US2020035806A1 Publication Date: 2020-01-30 Application Number: 16/117,166 Filing Date: 2018-08-30 Inventor: Cheng, Hsin-li   Kuo, Liang-tai   Chang yu chi   Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.   IPC: H01L29/51 Abstract: In some embodiments, a semiconductor device is provided. The semiconductor device includes a source region and a drain region arranged in a semiconductor substrate, where the source region is laterally separated from the drain region. A gate stack is arranged over the semiconductor substrate and between the source region and the drain region. A cap layer is arranged over the gate stack, where a bottom surface of the cap layer contacts a top surface of the gate stack. Sidewall spacers are arranged along sides of the gate stack and the cap layer. A resist protective oxide (RPO) layer is disposed over the cap layer, where the RPO layer extends along sides of the sidewalls spacers to the semiconductor substrate. A contact etch stop layer is arranged over the RPO layer, the source region, and the drain region.
9
US10692788B2
Device to decrease flicker noise in conductor-insulator-semiconductor (CIS) devices
Publication/Patent Number: US10692788B2 Publication Date: 2020-06-23 Application Number: 15/688,018 Filing Date: 2017-08-28 Inventor: Lo, Wen-shun   Huang, Ching-hsien   Chang yu chi   Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.   IPC: H01L23/13 Abstract: A conductive-insulator-semiconductor (CIS) device with low flicker noise is provided. In some embodiments, the CIS device comprises a semiconductor substrate, a pair of source/drain regions, a selectively-conductive channel, and a gate electrode. The pair of source/drain regions is in the semiconductor substrate, and the source/drain regions are laterally spaced. The selectively-conductive channel is in the semiconductor substrate, and extends laterally in a first direction, from one of the source/drain regions to another one of the source/drain regions. The gate electrode comprises a pair of peripheral segments and a central segment. The peripheral segments extend laterally in parallel in the first direction. The central segment covers the selectively-conductive channel and extends laterally in a second direction transverse to the first direction, from one of the peripheral segments to another one of the peripheral segments. A method for manufacturing the CIS device is also provided.
10
US10686000B1
Solid-state imaging device
Publication/Patent Number: US10686000B1 Publication Date: 2020-06-16 Application Number: 16/382,808 Filing Date: 2019-04-12 Inventor: Lin, Cheng-hsuan   Tu, Zong-ru   Chang yu chi   Li, Ching-hua   Assignee: VISERA TECHNOLOGIES COMPANY LIMITED   IPC: H01L27/146 Abstract: A solid-state imaging device includes multiple photoelectric conversion elements arrayed in a pixel array. The solid-state imaging device also includes a color filter layer having multiple color filter segments above the photoelectric conversion elements. Each of the color filter segments is disposed in a respective pixel of the pixel array. The solid-state imaging device further includes an optical waveguide layer over the color filter layer. The optical waveguide layer includes a waveguide partition grid and a waveguide material in the spaces of the waveguide partition grid. The waveguide material has a refractive index that is higher than the refractive index of the waveguide partition grid. The waveguide material provides the same refractive index for each pixel of the pixel array.
11
US10763329B2
Semiconductor device
Publication/Patent Number: US10763329B2 Publication Date: 2020-09-01 Application Number: 16/459,497 Filing Date: 2019-07-01 Inventor: Lo, Wen-shun   Chang yu chi   Tsui, Felix Ying-kit   Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.   IPC: H01L29/10 Abstract: A semiconductor device includes a semiconductor substrate, a gate electrode, a channel region, a pair of source/drain regions and a threshold voltage adjusting region. The gate electrode is over the semiconductor substrate. The channel region is between the semiconductor substrate and the gate electrode. The channel region includes a pair of first sides opposing to each other in a channel length direction, and a pair of second sides opposing to each other in a channel width direction. The source/drain regions are adjacent to the pair of first sides of the channel region in the channel length direction. The threshold voltage adjusting region covers the pair of second sides of the channel region in the channel width direction, and exposing the pair of first sides of the channel region in the channel length direction.
12
US2020286987A1
SEMICONDUCTOR DEVICE HAVING DIODE DEVICES WITH DIFFERENT BARRIER HEIGHTS AND MANUFACTURING METHOD THEREOF
Publication/Patent Number: US2020286987A1 Publication Date: 2020-09-10 Application Number: 15/930,390 Filing Date: 2020-05-12 Inventor: Lo, Wen-shun   Chang yu chi   Tsui, Felix Ying-kit   Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.   IPC: H01L29/06 Abstract: A Schottky diode device includes a substrate having a first conductivity type, a first well region having a second conductivity type disposed in the substrate, and a first doped region having the second conductivity type in the first well region, wherein the first doped region includes a first portion and a second portion, and the first portion and the second portion have different doping concentrations. The first portion includes a region having at least four sides, from a top-view perspective, abutting the second portion.
13
US2020135540A1
SEMICONDUCTOR STRUCTURE INCLUDING ISOLATIONS
Publication/Patent Number: US2020135540A1 Publication Date: 2020-04-30 Application Number: 16/723,262 Filing Date: 2019-12-20 Inventor: Lo, Wen-shun   Chang yu chi   Tsui, Felix Ying-kit   Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.   IPC: H01L21/762 Abstract: A semiconductor structure includes a substrate having a first region and a second region defined thereon, a first isolation in the first region, a second isolation in the second region, and a region surrounding the first isolation in the substrate. The substrate includes a first material, and the region includes the first material and a second material. The first isolation has a first width, the second isolation has a second width, and the first width is greater than the second width. A bottom and sidewalls of the first isolation are in contact with the region, and a bottom and sidewalls of the second isolation are in contact with the substrate.
14
US10658456B2
Semiconductor device having diode devices with different barrier heights and manufacturing method thereof
Publication/Patent Number: US10658456B2 Publication Date: 2020-05-19 Application Number: 16/222,464 Filing Date: 2018-12-17 Inventor: Lo, Wen-shun   Chang yu chi   Tsui, Felix Ying-kit   Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.   IPC: H01L21/426 Abstract: The present disclosure provides a method of manufacturing a Schottky diode. The method includes: providing a substrate; forming a first well region in the substrate; defining a first portion and a second portion on a surface of the first well region and performing a first ion implantation on the first portion while keeping the second portion from being implanted; forming a first doped region by heating the substrate to cause dopant diffusion between the first portion and the second portion; and forming a metal-containing layer on the first doped region to obtain a Schottky barrier interface.
15
TW201935823A
Driver chip of half bridge circuit with protection circuit and protection method thereof
Publication/Patent Number: TW201935823A Publication Date: 2019-09-01 Application Number: 107104247 Filing Date: 2018-02-07 Inventor: Chang yu chi   Assignee: Nuvoton Technology Corporation   IPC: H02M1/38 Abstract: A driver chip of the half bridge circuit with a protection circuit and a method thereof are disclosed. A high side voltage detection module connects to a high side signal output terminal and detects a high side turn on voltage of a high side transistor, so as to obtain a high side turn on signal. A low side voltage detection module connects to a low side signal output terminal and detects a low side turn on voltage of a low side transistor, so as to obtain a low side turn on signal. When the high side turn on signal and the low side turn on signal are received by a protection module, a reset signal is generated. The reset signal is sent to the high side driver module for turning off the high side transistor and the reset signal is also sent to the low side driver module for turning off the low side transistor.
16
US2019245339A1
HALF BRIDGE CIRCUIT DRIVER CHIP WITH PROTECTION CIRCUIT AND PROTECTION METHOD THEREOF
Publication/Patent Number: US2019245339A1 Publication Date: 2019-08-08 Application Number: 16/110,258 Filing Date: 2018-08-23 Inventor: Chang yu chi   Assignee: Nuvoton Technology Corporation   IPC: H03K17/00 Abstract: A half bridge circuit driver chip and the protection method thereof are provided. The high side voltage detecting circuit connects to a high side signal output terminal and detects the high side turn-on voltage of the high side transistor, so as to obtain a high side turn-on signal. The low side voltage detection circuit connects to a low side signal output terminal and detects a low side turn-on voltage of a low side transistor, so as to obtain a low side turn on signal. When the high side turn-on signal and the low side turn-on signal are received by a protection circuit, a reset signal is generated. The reset signal is sent to the high side driving circuit for turning off the high side transistor and to the low side driving circuit for turning off the low side transistor.
17
TWI650922B
Driver chip of half bridge circuit with protection circuit and protection method thereof
Publication/Patent Number: TWI650922B Publication Date: 2019-02-11 Application Number: 107104247 Filing Date: 2018-02-07 Inventor: Chang yu chi   Assignee: Nuvoton Technology Corporation   IPC: H02M1/38 Abstract: A driver chip of the half bridge circuit with a protection circuit and a method thereof are disclosed. A high side voltage detection module connects to a high side signal output terminal and detects a high side turn on voltage of a high side transistor, so as to obtain a high side turn on signal. A low side voltage detection module connects to a low side signal output terminal and detects a low side turn on voltage of a low side transistor, so as to obtain a low side turn on signal. When the high side turn on signal and the low side turn on signal are received by a protection module, a reset signal is generated. The reset signal is sent to the high side driver module for turning off the high side transistor and the reset signal is also sent to the low side driver module for turning off the low side transistor.
18
US2019158071A1
DRIVER CHIP AND DRIVING METHOD OF A HALF BRIDGE CIRCUIT
Publication/Patent Number: US2019158071A1 Publication Date: 2019-05-23 Application Number: 16/047,405 Filing Date: 2018-07-27 Inventor: Chang yu chi   Assignee: NUVOTON TECHNOLOGY CORPORATION   IPC: H03K3/012 Abstract: A driver chip includes a high side input terminal, a pulse generator, a level shift, a current detector, a high side output controller, and a high side output terminal. The high side input terminal receives the high side input signal and the pulse generator transfers the high side input signal into the rise pulse signal and the fall pulse signal. The current detector detects the first current and the second current flowing through the level shift, and the high side output controller generates the high side output signal. The high side output terminal controls the switching of the high side transistor by the high side output signal.
19
TW201924222A
Driver chip and driving method of half bridge circuit
Publication/Patent Number: TW201924222A Publication Date: 2019-06-16 Application Number: 106139950 Filing Date: 2017-11-17 Inventor: Chang yu chi   Assignee: Nuvoton Technology Corporation   IPC: H03K17/94 Abstract: A driver chip and a driving method of the half bridge circuit are disclosed. The driver chip of the half bridge includes a high side input terminal, a pulse generating module, a level shift, a current detecting module, a high side output module and a high side output terminal. The high side input terminal receives a high side input signal and the high side input signal is converted into a rising pulse signal and a falling pulse signal. The current detecting module determines a first current and a second current of the level shift, so as to obtain a high side output signal by the high side output module. The switch of the high side transistor is controlled by the high side output signal through the high side output terminal.
20
KR20190049597A
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
Publication/Patent Number: KR20190049597A Publication Date: 2019-05-09 Application Number: 20180132200 Filing Date: 2018-10-31 Inventor: Chang, Yu Chi   Tsui, Felix Ying Kit   Lo, Wen Shun   Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.   IPC: H01L29/78 Abstract: According to the present invention, a semiconductor device comprises a semiconductor substrate, a gate electrode, a pair of source/drain regions, and a threshold voltage adjustment region. The gate electrode is on the semiconductor substrate. A channel region is between the semiconductor substrate and the gate electrode. The source/drain regions are adjacent to two opposite sides of the channel region in a channel length direction. The threshold voltage adjustment region is adjacent to two opposite sides of the channel region in a channel width direction of the channel region, wherein the threshold voltage adjustment region and the channel region have the same doping type.
Total 10 pages