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1 | US2021040943A1 |
PUMPING STRUCTURE, PARTICLE DETECTOR AND METHOD FOR PUMPING
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Publication/Patent Number: US2021040943A1 | Publication Date: 2021-02-11 | Application Number: 16/967,828 | Filing Date: 2019-02-01 | Inventor： Coppeta, Raffaele Brivio, Jacopo Pires, Singulani Anderson Vescoli, Verena | Assignee: ams AG | IPC: F04B43/04 | Abstract: A pumping structure comprises at least two membranes, at least two actuation chambers, one evaluation chamber comprising an opening to the outside of the pumping structure, and at least three electrodes. Each membrane is arranged between two electrodes in a vertical direction which is perpendicular to the main plane of extension of the pumping structure, each actuation chamber is arranged between one of the membranes and one of the electrodes in vertical direction, and each actuation chamber is connected to the evaluation chamber via a channel. Furthermore, a particle detector and a method for pumping are provided. | |||
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2 | EP3460835B1 |
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
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Publication/Patent Number: EP3460835B1 | Publication Date: 2020-04-01 | Application Number: 17192105.9 | Filing Date: 2017-09-20 | Inventor： Parteder, Georg Kraft, Jochen Coppeta, Raffaele | Assignee: ams AG | IPC: H01L21/768 | ||||
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3 | EP3527826B1 |
PUMPING STRUCTURE, PARTICLE DETECTOR AND METHOD FOR PUMPING
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Publication/Patent Number: EP3527826B1 | Publication Date: 2020-07-08 | Application Number: 18157175.3 | Filing Date: 2018-02-16 | Inventor： Coppeta, Raffaele Brivio, Jacopo Singulani, Anderson Vescoli, Verena | Assignee: ams AG | IPC: F04B43/02 | ||||
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4 | US2020020611A1 |
Semiconductor Device
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Publication/Patent Number: US2020020611A1 | Publication Date: 2020-01-16 | Application Number: 16/483,884 | Filing Date: 2018-02-14 | Inventor： Kraft, Jochen Parteder, Georg Singulani, Anderson Coppeta, Raffaele Schrank, Franz | Assignee: ams AG | IPC: H01L23/48 | Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via. Furthermore, the etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction. | |||
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5 | US202020611A1 |
Semiconductor Device
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Publication/Patent Number: US202020611A1 | Publication Date: 2020-01-16 | Application Number: 20/181,648 | Filing Date: 2018-02-14 | Inventor： Singulani, Anderson Kraft, Jochen Parteder, Georg Coppeta, Raffaele Schrank, Franz | Assignee: ams AG | IPC: H01L23/528 | Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via. Furthermore, the etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction. | |||
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6 | WO2019158377A1 |
PUMPING STRUCTURE, PARTICLE DETECTOR AND METHOD FOR PUMPING
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Publication/Patent Number: WO2019158377A1 | Publication Date: 2019-08-22 | Application Number: 2019052534 | Filing Date: 2019-02-01 | Inventor： Vescoli, Verena Singulani, Anderson Coppeta, Raffaele Brivio, Jacopo | Assignee: AMS AG | IPC: F04B43/02 | Abstract: A pumping structure (20) comprises at least two membranes (21), at least two actuation chambers (22), one evaluation chamber (23) comprising an opening (24) to the outside of the pumping structure (20), and at least three electrodes (25). Each membrane (21) is arranged between two electrodes (25) in a vertical direction (z) which is perpendicular to the main plane of extension of the pumping structure (20), each actuation chamber (22) is arranged between one of the membranes (21) and one of the electrodes (25) in vertical direction (z), and each actuation chamber (22) is connected to the evaluation chamber (23) via a channel (26). Furthermore, a particle detector (27) and a method for pumping are provided. | |||
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7 | TW201916249A |
Method for manufacturing a semiconductor device and semiconductor device
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Publication/Patent Number: TW201916249A | Publication Date: 2019-04-16 | Application Number: 107130141 | Filing Date: 2018-08-29 | Inventor： Kraft, Jochen Parteder, Georg Coppeta, Raffaele | Assignee: AMS AG | IPC: H01L21/76 | Abstract: A method for manufacturing a semiconductor device (10) is provided. The method comprises the steps of providing a semiconductor body (11), forming a trench (12) in the semiconductor body (11) in a vertical direction (z) which is perpendicular to the main plane of extension of the semiconductor body (11), and coating inner walls (13) of the trench (12) with an isolation layer (14). The method further comprises the steps of coating the isolation layer (14) at the inner walls (13) with a metallization layer (15), coating a top side (16) of the semiconductor body (11), at which the trench (12) is formed, at least partially with an electrically conductive contact layer (17), where the contact layer (17) is electrically connected with the metallization layer (15), coating the top side (16) of the semiconductor body (11) at least partially and the trench (12) with a capping layer (24), and forming a contact pad (18) at the top side (16) of the semiconductor body (11) by removing the contact layer (17) and the capping layer (24) at least partially. Furthermore, a semiconductor device (10) is provided. | |||
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8 | EP3460835A1 |
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
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Publication/Patent Number: EP3460835A1 | Publication Date: 2019-03-27 | Application Number: 17192105.9 | Filing Date: 2017-09-20 | Inventor： Parteder, Georg Kraft, Jochen Coppeta, Raffaele | Assignee: ams AG | IPC: H01L21/768 | Abstract: A method for manufacturing a semiconductor device (10) is provided. The method comprises the steps of providing a semiconductor body (11), forming a trench (12) in the semiconductor body (11) in a vertical direction (z) which is perpendicular to the main plane of extension of the semiconductor body (11), and coating inner walls (13) of the trench (12) with an isolation layer (14). The method further comprises the steps of coating the isolation layer (14) at the inner walls (13) with a metallization layer (15), coating a top side (16) of the semiconductor body (11), at which the trench (12) is formed, at least partially with an electrically conductive contact layer (17), where the contact layer (17) is electrically connected with the metallization layer (15), coating the top side (16) of the semiconductor body (11) at least partially and the trench (12) with a capping layer (24), and forming a contact pad (18) at the top side (16) of the semiconductor body (11) by removing the contact layer (17) and the capping layer (24) at least partially. Furthermore, a semiconductor device (10) is provided. | |||
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9 | EP3527826A1 |
PUMPING STRUCTURE, PARTICLE DETECTOR AND METHOD FOR PUMPING
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Publication/Patent Number: EP3527826A1 | Publication Date: 2019-08-21 | Application Number: 18157175.3 | Filing Date: 2018-02-16 | Inventor： Coppeta, Raffaele Brivio, Jacopo Singulani, Anderson Vescoli, Verena | Assignee: ams AG | IPC: F04B43/02 | Abstract: A pumping structure (20) comprises at least two membranes (21), at least two actuation chambers (22), one evaluation chamber (23) comprising an opening (24) to the outside of the pumping structure (20), and at least three electrodes (25). Each membrane (21) is arranged between two electrodes (25) in a vertical direction (z) which is perpendicular to the main plane of extension of the pumping structure (20), each actuation chamber (22) is arranged between one of the membranes (21) and one of the electrodes (25) in vertical direction (z), and each actuation chamber (22) is connected to the evaluation chamber (23) via a channel (26). Furthermore, a particle detector (27) and a method for pumping are provided. | |||
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10 | WO2019057436A1 |
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
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Publication/Patent Number: WO2019057436A1 | Publication Date: 2019-03-28 | Application Number: 2018072767 | Filing Date: 2018-08-23 | Inventor： Kraft, Jochen Parteder, Georg Coppeta, Raffaele | Assignee: AMS AG | IPC: H01L23/48 | Abstract: A method for manufacturing a semiconductor device (10) is provided. The method comprises the steps of providing a semiconductor body (11), forming a trench (12) in the semiconductor body (11) in a vertical direction (z) which is perpendicular to the main plane of extension of the semiconductor body (11), and coating inner walls (13) of the trench (12) with an isolation layer (14). The method further comprises the steps of coating the isolation layer (14) at the inner walls (13) with a metallization layer (15), coating a top side (16) of the semiconductor body (11), at which the trench (12) is formed, at least partially with an electrically conductive contact layer (17), where the contact layer (17) is electrically connected with the metallization layer (15), coating the top side (16) of the semiconductor body (11) at least partially and the trench (12) with a capping layer (24), and forming a contact pad (18) at the top side (16) of the semiconductor body (11) by removing the contact layer (17) and the capping layer (24) at least partially. Furthermore, a semiconductor device (10) is provided. | |||
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11 | WO2019211041A1 |
SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA
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Publication/Patent Number: WO2019211041A1 | Publication Date: 2019-11-07 | Application Number: 2019056964 | Filing Date: 2019-03-20 | Inventor： Schrank, Franz Kraft, Jochen Parteder, Georg Singulani, Anderson Coppeta, Raffaele | Assignee: AMS AG | IPC: H01L23/48 | Abstract: A semiconductor device (10) comprises a semiconductor body (11), an electrically conductive via (12) which extends through at least a part of the semiconductor body (11), and where the via (12) has a top side (13) and a bottom side (14) that faces away from the top side (13), an electrically conductive etch-stop layer (15) arranged at the bottom side (14) of the via (12) in a plane which is parallel to a lateral direction (x), where the lateral direction (x) is perpendicular to a vertical direction (z) given by the main axis of extension of the via (12), and at least one electrically conductive contact layer (16) at the bottom side (14) of the via (12) in a plane which is parallel to the lateral direction (x). The etch-stop layer (16) is arranged between the electrically conductive via (12) and the contact layer (16) in the vertical direction (z), the lateral extent in the lateral direction (x) of the etch-stop layer (15) amounts to at least 2.5 times the lateral extent of the via (12) in the lateral direction (x), and the lateral extent of the contact layer (16) is smaller than the lateral extent of the via (12) or the lateral extent of the contact layer (16) amounts to at least 2.5 times the lateral extent of the via (12). | |||
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12 | EP3564994A1 |
SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA
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Publication/Patent Number: EP3564994A1 | Publication Date: 2019-11-06 | Application Number: 18170639.1 | Filing Date: 2018-05-03 | Inventor： Kraft, Dr. Jochen Parteder, Georg Singulani, Anderson Coppeta, Raffaele Schrank, Franz | Assignee: ams AG | IPC: H01L23/48 | Abstract: A semiconductor device (10) comprises a semiconductor body (11), an electrically conductive via (12) which extends through at least a part of the semiconductor body (11), and where the via (12) has a top side (13) and a bottom side (14) that faces away from the top side (13), an electrically conductive etch-stop layer (15) arranged at the bottom side (14) of the via (12) in a plane which is parallel to a lateral direction (x), where the lateral direction (x) is perpendicular to a vertical direction (z) given by the main axis of extension of the via (12), and at least one electrically conductive contact layer (16) at the bottom side (14) of the via (12) in a plane which is parallel to the lateral direction (x). The etch-stop layer (16) is arranged between the electrically conductive via (12) and the contact layer (16) in the vertical direction (z), the lateral extent in the lateral direction (x) of the etch-stop layer (15) amounts to at least 2.5 times the lateral extent of the via (12) in the lateral direction (x), and the lateral extent of the contact layer (16) is smaller than the lateral extent of the via (12) or the lateral extent of the contact layer (16) amounts to at least 2.5 times the lateral extent of the via (12) . | |||
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13 | TW201832341A |
Semiconductor device
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Publication/Patent Number: TW201832341A | Publication Date: 2018-09-01 | Application Number: 107105265 | Filing Date: 2018-02-13 | Inventor： Schrank, Franz Kraft, Jochen Parteder, Georg Coppeta, Raffaele Singulani, Anderson | Assignee: AMS AG | IPC: H01L23/538 | Abstract: A semiconductor device (10) comprises a semiconductor body (11) and an electrically conductive via (12) which extends through at least a part of the semiconductor body (11), where the via (12) has a lateral size which is given in a first lateral direction (x) that is perpendicular to a vertical direction (z) given by the main axis of extension of the via (12) and where the via (12) has a top side (13) and a bottom side (14) that faces away from the top side (13). The semiconductor device (10) further comprises an electrically conductive etch-stop layer (15) arranged at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x), and at least one electrically conductive contact layer (16) at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x). The lateral extent in the first lateral direction (x) of the etch-stop layer (15) is larger than the lateral size of the via (12) and the lateral extent in the first lateral direction (x) of the contact layer (16) is smaller than the lateral size of the via (12). Furthermore, the etch-stop layer (15) is arranged between the electrically conductive via (12) and the contact layer (16) in the vertical direction (z). | |||
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14 | EP3364454A1 |
SEMICONDUCTOR DEVICE
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Publication/Patent Number: EP3364454A1 | Publication Date: 2018-08-22 | Application Number: 17156319.0 | Filing Date: 2017-02-15 | Inventor： Kraft, Jochen Parteder, Georg Singulani, Anderson Coppeta, Raffaele Schrank, Franz | Assignee: AMS AG | IPC: H01L23/48 | Abstract: A semiconductor device (10) comprises a semiconductor body (11) and an electrically conductive via (12) which extends through at least a part of the semiconductor body (11), where the via (12) has a lateral size which is given in a first lateral direction (x) that is perpendicular to a vertical direction (z) given by the main axis of extension of the via (12) and where the via (12) has a top side (13) and a bottom side (14) that faces away from the top side (13). The semiconductor device (10) further comprises an electrically conductive etch-stop layer (15) arranged at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x), and at least one electrically conductive contact layer (16) at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x). The lateral extent in the first lateral direction (x) of the etch-stop layer (15) is larger than the lateral size of the via (12) and the lateral extent in the first lateral direction (x) of the contact layer (16) is smaller than the lateral size of the via (12). Furthermore, the etch-stop layer (15) is arranged between the electrically conductive via (12) and the contact layer (16) in the vertical direction (z). |
3.Current Quota