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1 | US10756061B2 |
Multi-layer chip and fabrication method thereof
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Publication/Patent Number: US10756061B2 | Publication Date: 2020-08-25 | Application Number: 16/249,449 | Filing Date: 2019-01-16 | Inventor： Cao, Jing Hu sheng | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L25/065 | Abstract: A multi-layer chip and a fabrication method thereof are disclosed. The method includes: bonding a first chip having a first metal layer to a second chip having a second metal layer; forming a first metal contact in the second chip, the first metal contact connecting to the second metal layer; depositing oxide on the second chip to form a first oxide layer; bonding the first oxide layer and a second oxide layer of a third chip; and forming a second metal contact penetrating through the first oxide layer and the second oxide layer for connecting the first metal contact with a third metal layer in the third chip via the second metal contact. | |||
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2 | WO2020015253A1 |
ALUMINUM PROFILE FLOATING ROOF
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Publication/Patent Number: WO2020015253A1 | Publication Date: 2020-01-23 | Application Number: 2018114381 | Filing Date: 2018-11-07 | Inventor： Li, Xingqiang Hu sheng | Assignee: GUANGDONG SHI HUA TECHNOLOGY CO., LIMITED | IPC: B65D88/42 | Abstract: An aluminum profile floating roof (1). The floating roof (1) comprises a floating roof body (12); the floating roof body (12) comprises a plurality of float elements (121); and the float element (121) is provided with a multi-cabin structural cavity body. The floating roof (1) further comprises a sidewall sealing structure (11); the sidewall sealing structure (11) comprises a wall surface oil scraping brush (115) connected to a telescopic airbag (114); and the wall surface oil scraping brush (115) forms an annular seal with the wall surface under the action of the telescopic airbag (114). | |||
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3 | US2020242155A1 |
SEARCH APPARATUS, SEARCH METHOD, AND NON-TRANSITORY STORAGE MEDIUM
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Publication/Patent Number: US2020242155A1 | Publication Date: 2020-07-30 | Application Number: 16/755,930 | Filing Date: 2018-10-15 | Inventor： Liu, Jianquan Hu sheng | Assignee: NEC Corporation | IPC: G06F16/783 | Abstract: A search apparatus (10) including a storage unit (11) that stores video index information including correspondence information which associates a type of one or a plurality of objects extracted from a video with a motion of the object, an acquisition unit (12) that acquires a search key associating the type of one or the plurality of objects as a search target with the motion of the object, and a search unit (13) that searches the video index information on the basis of the search key is provided. | |||
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4 | US2020411368A1 |
Semiconductor Device And Method For Manufacturing The Same
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Publication/Patent Number: US2020411368A1 | Publication Date: 2020-12-31 | Application Number: 16/581,010 | Filing Date: 2019-09-24 | Inventor： Sheng, Beibei Hu sheng | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/768 | Abstract: A semiconductor device and a method for manufacturing the same. When a pattern for etching is formed through photolithography after forming a photoresist layer on an adhesion layer, a sub-resolution auxiliary pattern of the mask is above the non-lead-out region, and an exposable pattern of the mask is above a lead-out region. In the photolithography, a first partial exposure region exposed partially in depth is formed in the photoresist layer corresponding to the sub-resolution auxiliary pattern, and an exposed pattern that is exposed completely is formed in the photoresist layer corresponding to the exposable pattern. After anisotropic etching on the adhesion layer through the photoresist layer, both an opening running through a partial thickness of the adhesion layer and a via hole running through the adhesion layer are formed. The opening balances a load in planarization during a process of filling the via hole. | |||
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5 | WO2020015254A1 |
NOVEL ALUMINUM FLOATING ROOF
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Publication/Patent Number: WO2020015254A1 | Publication Date: 2020-01-23 | Application Number: 2018114384 | Filing Date: 2018-11-07 | Inventor： Li, Xingqiang Hu sheng | Assignee: GUANGDONG SHI HUA TECHNOLOGY CO., LIMITED | IPC: B65D88/36 | Abstract: An aluminum floating roof, comprising a body (12). The body (12) comprises a plurality of pontoon elements (121). The pontoon element (121) is formed from an aluminum material in a single extrusion molding process. The plurality of pontoon elements (121) form an engagement connection with one another. The pontoon element (121) has left and right joining sides comprising a first side (1211) and a second side (1212). The first side (1211) has a hook-shaped protrusion (1213). The second side (1212) has a recess (1214) capable of accommodating the hook-shaped protrusion (1213). The pontoon elements (121) are configured to join with adjacent pontoon elements (121) by means of cooperation between the hook-shaped protrusions (1213) and the recesses (1214) at the left and right sides thereof. | |||
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6 | US202013824A1 |
MANUFACTURING METHOD OF IMAGE SENSING DEVICE
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Publication/Patent Number: US202013824A1 | Publication Date: 2020-01-09 | Application Number: 20/191,657 | Filing Date: 2019-09-15 | Inventor： Hu sheng Wang, Xilong Sun, Peng | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L27/146 | Abstract: A manufacturing method of an image sensing device includes the following steps. A substrate is provided. At least one image sensing unit is disposed in the substrate. A passivation layer is formed on the substrate. An auxiliary layer is formed on the passivation layer. A material composition of the auxiliary layer is different from a material composition of the passivation layer. An annealing process is performed to the substrate and the passivation layer. The passivation layer is covered by the auxiliary layer during the annealing process. The auxiliary layer is removed after the annealing process. The ability to constrain and/or passivate free charge in and/or near the passivation layer may be enhanced by performing the annealing process with the auxiliary layer covering the passivation layer. The electrical performance of the image sensing device may be improved accordingly. | |||
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7 | US2020013824A1 |
MANUFACTURING METHOD OF IMAGE SENSING DEVICE
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Publication/Patent Number: US2020013824A1 | Publication Date: 2020-01-09 | Application Number: 16/571,178 | Filing Date: 2019-09-15 | Inventor： Sun, Peng Wang, Xilong Hu sheng | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L27/146 | Abstract: A manufacturing method of an image sensing device includes the following steps. A substrate is provided. At least one image sensing unit is disposed in the substrate. A passivation layer is formed on the substrate. An auxiliary layer is formed on the passivation layer. A material composition of the auxiliary layer is different from a material composition of the passivation layer. An annealing process is performed to the substrate and the passivation layer. The passivation layer is covered by the auxiliary layer during the annealing process. The auxiliary layer is removed after the annealing process. The ability to constrain and/or passivate free charge in and/or near the passivation layer may be enhanced by performing the annealing process with the auxiliary layer covering the passivation layer. The electrical performance of the image sensing device may be improved accordingly. | |||
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8 | US10840085B2 |
Method for improving bonding of dangling bonds of silicon atoms
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Publication/Patent Number: US10840085B2 | Publication Date: 2020-11-17 | Application Number: 16/351,407 | Filing Date: 2019-03-12 | Inventor： Wang, Xilong Hu sheng Zou, Wen | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/02 | Abstract: The invention discloses a method for improving bonding of dangling bonds of silicon atoms. A surface of a wafer is oxidized to form a silicon oxide layer. The upper surface of the silicon oxide layer has a dangling bond. A dielectric layer is disposed on the upper surface of the silicon oxide layer, which is then subjected to an oxygen-enriched oxidation treatment at a preset first temperature. A protective layer is disposed on the upper surface of the dielectric layer. The wafer is then subjected to an annealing treatment. By passing oxidizing gas through the surface of the protective layer, oxygen ions in the oxidizing gas penetrate the dielectric layer to reach wafer surface. After high-temperature annealing treatment, the unsaturated bonds of the silicon atoms are bonded to the oxygen ions on the wafer surface, thereby improving the bonding of the dangling bonds on the wafer surface. | |||
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9 | US2020365539A1 |
Bonding Structure And Method For Manufacturing The Same
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Publication/Patent Number: US2020365539A1 | Publication Date: 2020-11-19 | Application Number: 16/584,331 | Filing Date: 2019-09-26 | Inventor： Liang, Fei Cao, Jing Hu sheng | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L23/00 | Abstract: A bonding structure and a method for manufacturing the bonding structure are provided. Multiple chips arranged in an array are formed on a surface of a wafer. Each of the chips includes a device structure, an interconnect structure electrically connected to the device structure, and a first package pad layer electrically connected to the interconnect structure. The first package pad layer is arranged at an edge region of the chip. A chip stack is obtained after bonding and cutting the multiple wafers, and the first package pad layer at the edge region of the chip is exposed. | |||
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10 | US2020075483A1 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
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Publication/Patent Number: US2020075483A1 | Publication Date: 2020-03-05 | Application Number: 16/397,130 | Filing Date: 2019-04-29 | Inventor： Zhou, Yu Liu, Tianjian Hu sheng Zhao, Changlin Hu, Xing | Assignee: WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD. | IPC: H01L23/522 | Abstract: A semiconductor device and a manufacturing method thereof are disclosed. In which a first opening and a second opening are vertically separated, and are no longer restricted by the condition that a deep upper opening needs to be filled with a thick photoresist when a TSV nested hole in vertical communication forms a middle opening and lower opening, thereby satisfying devices with different thicknesses requirements. The design is no longer restricted by the lateral process of the TSV nested hole, thereby enhancing the flexibility of the design. In the photolithography process, the deep hole does not need to be filled with the photoresist, the photoresist does not need to be thick, thereby reducing the complexity of the photolithography process and improving the exposure effect. The first metal layer and the second metal layer are directly led out via a first trench, thereby simplifying the process and reducing the production cost. | |||
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11 | US2020075460A1 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
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Publication/Patent Number: US2020075460A1 | Publication Date: 2020-03-05 | Application Number: 16/397,066 | Filing Date: 2019-04-29 | Inventor： Hu, Xing Zhou, Yu Liu, Tianjian Hu sheng Zhao, Changlin | Assignee: WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD. | IPC: H01L23/48 | Abstract: A semiconductor device and a manufacturing method thereof are disclosed. In the device, the isolation layer is used to prevent the first metal layer and the second metal layer which are over-etched and back-splashed from diffusing to a first substrate; and the isolation layer serves as a barrier layer to prevent an interconnection layer from diffusing into the first substrate. Further, the isolation layer includes a silicon nitride layer, which is advantageous for preventing the metal layers from back-splashing and diffusing to the sidewall of the first substrate. The isolation layer further includes a first silicon oxide layer and a second silicon oxide layer, wherein the second silicon oxide layer is used to protect the silicon nitride layer from being etched and consumed and the first silicon oxide layer is used to improve the adhesion between the silicon nitride layer and the first substrate. | |||
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12 | US2020379323A1 |
LENS AND PROJECTION DEVICE
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Publication/Patent Number: US2020379323A1 | Publication Date: 2020-12-03 | Application Number: 16/858,694 | Filing Date: 2020-04-26 | Inventor： Lin, Chien-hung Hsu, Tzu-huan Hu sheng wen Yeh, Hsin-jung Tsung, Chih-chieh | Assignee: QISDA CORPORATION | IPC: G03B21/14 | Abstract: A lens includes a casing, a first lens group, a second lens group and a heat dissipating member. The first lens group is disposed in the casing and close to a first side of the casing. The second lens group is disposed in the casing and close to a second side of the casing, wherein the first side is opposite to the second side. The heat dissipating member is disposed at the second side of the casing and contacts the casing. | |||
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13 | US2020343925A1 |
CASE STRUCTURE
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Publication/Patent Number: US2020343925A1 | Publication Date: 2020-10-29 | Application Number: 16/835,358 | Filing Date: 2020-03-31 | Inventor： Huang, Tsu-hsuan Yeh, Chun-liang Chiang, Pai-hong Chung, Ming-ju Chiang, An-chun Chen hu sheng | Assignee: PEGATRON CORPORATION | IPC: H04B1/3888 | Abstract: A case structure includes an inner case base, a buffer outer case and a torsional spring. The inner case base has a corner area and a fixing column located at the corner area. The buffer outer case is movably overlapped on an outer side of the corner area. The torsional spring is sleeved on the fixing column and located between the buffer outer case and the inner case base. A first end and a second end of the torsional spring are respectively connected to the buffer outer case. When the force exerted on the buffer outer case causes the buffer outer case to move relative to the inner case base, the torsional spring correspondingly deforms and stores elastic potential energy. When the force exerted on the buffer outer case disappears, the torsional spring releases the elastic potential energy to reposition the buffer outer case. | |||
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14 | EP3729991A1 |
CASE STRUCTURE
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Publication/Patent Number: EP3729991A1 | Publication Date: 2020-10-28 | Application Number: 20166972.8 | Filing Date: 2020-03-31 | Inventor： Huang, Tsu-hsuan Yeh, Chun-liang Chiang, Pai-hong Chung, Ming-ju Chiang, An-chun Chen hu sheng | Assignee: Pegatron Corporation | IPC: A45C11/00 | Abstract: A case structure includes an inner case base, a buffer outer case and a torsional spring. The inner case base has a corner area and a fixing column located at the corner area. The buffer outer case is movably overlapped on an outer side of the corner area. The torsional spring is sleeved on the fixing column and located between the buffer outer case and the inner case base. A first end and a second end of the torsional spring are respectively connected to the buffer outer case. When the force exerted on the buffer outer case causes the buffer outer case to move relative to the inner case base, the torsional spring correspondingly deforms and stores elastic potential energy. When the force exerted on the buffer outer case disappears, the torsional spring releases the elastic potential energy to reposition the buffer outer case. | |||
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15 | US2019221545A1 |
MULTI-LAYER CHIP AND FABRICATION METHOD THEREOF
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Publication/Patent Number: US2019221545A1 | Publication Date: 2019-07-18 | Application Number: 16/249,449 | Filing Date: 2019-01-16 | Inventor： Cao, Jing Hu sheng | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L25/065 | Abstract: A multi-layer chip and a fabrication method thereof are disclosed. The method includes: bonding a first chip having a first metal layer to a second chip having a second metal layer; forming a first metal contact in the second chip, the first metal contact connecting to the second metal layer; depositing oxide on the second chip to form a first oxide layer; bonding the first oxide layer and a second oxide layer of a third chip; and forming a second metal contact penetrating through the first oxide layer and the second oxide layer for connecting the first metal contact with a third metal layer in the third chip via the second metal contact. | |||
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16 | US10326146B2 |
Compositions, systems and methods for producing nanoalloys and/or nanocomposites using tandem laser ablation synthesis in solution-galvanic replacement reaction
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Publication/Patent Number: US10326146B2 | Publication Date: 2019-06-18 | Application Number: 15/132,916 | Filing Date: 2016-04-19 | Inventor： Mukherjee, Dibyendu Hu sheng | Assignee: Mukherjee, Dibyendu Hu, Sheng | IPC: H01M4/92 | Abstract: Compositions, systems, and methods for producing nanoalloys and/or nanocomposites using tandem laser ablation synthesis in solution-galvanic replacement reaction (LASiS-GRR) are disclosed. The method may include disposing a first metal composition within a reaction cell, adding a quantity of a second metal composition into the reaction cell, ablating, with a laser, the first metal composition disposed in the quantity of the second metal composition within the reaction cell, and tuning one or more reaction parameter and/or one or more functional parameter during the tandem LASiS-GRR in order to tailor at least one characteristic of the metal nanoalloy and/or the metal nanocomposite. | |||
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17 | US2019334180A1 |
COMPOSITIONS, SYSTEMS AND METHODS FOR PRODUCING NANOALLOYS AND/OR NANOCOMPOSITES USING TANDEM LASER ABLATION SYNTHESIS IN SOLUTION-GALVANIC REPLACEMENT REACTION
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Publication/Patent Number: US2019334180A1 | Publication Date: 2019-10-31 | Application Number: 16/439,052 | Filing Date: 2019-06-12 | Inventor： Mukherjee, Dibyendu Hu sheng | Assignee: Mukherjee, Dibyendu Hu, Sheng | IPC: H01M4/92 | Abstract: Compositions, systems, and methods for producing nanoalloys and/or nanocomposites using tandem laser ablation synthesis in solution-galvanic replacement reaction (LASiS-GRR) are disclosed. The method may include disposing a first metal composition within a reaction cell, adding a quantity of a second metal composition into the reaction cell, ablating, with a laser, the first metal composition disposed in the quantity of the second metal composition within the reaction cell, and tuning one or more reaction parameter and/or one or more functional parameter during the tandem LASiS-GRR in order to tailor at least one characteristic of the metal nanoalloy and/or the metal nanocomposite. | |||
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18 | WO2019078164A1 |
SEARCH DEVICE, TERMINAL DEVICE, ANALYSIS DEVICE, SEARCH METHOD, METHOD FOR OPERATING TERMINAL DEVICE, ANALYSIS METHOD, AND PROGRAM
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Publication/Patent Number: WO2019078164A1 | Publication Date: 2019-04-25 | Application Number: 2018038338 | Filing Date: 2018-10-15 | Inventor： Liu, Jianquan Hu sheng | Assignee: NEC CORPORATION | IPC: G06T7/215 | Abstract: Provided is a search device (10) having: a storage unit (11) that stores moving image index information that includes association information associating one or a plurality of object types extracted from the moving image with the movement of the object; an acquisition unit (12) that acquires a search key associating the one or plurality of object types of a search object with the movement of the object; and a search unit (13) that searches the moving image index information on the basis of the search key. | |||
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19 | US2019333762A1 |
METHOD FOR IMPROVING BONDING OF DANGLING BONDS OF SILICON ATOMS
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Publication/Patent Number: US2019333762A1 | Publication Date: 2019-10-31 | Application Number: 16/351,407 | Filing Date: 2019-03-12 | Inventor： Wang, Xilong Hu sheng Zou, Wen | Assignee: Wuhan Xinxin Semiconductor Manufacturing Co., Ltd. | IPC: H01L21/02 | Abstract: The invention discloses a method for improving bonding of dangling bonds of silicon atoms. A surface of a wafer is oxidized to form a silicon oxide layer. The upper surface of the silicon oxide layer has a dangling bond. A dielectric layer is disposed on the upper surface of the silicon oxide layer, which is then subjected to an oxygen-enriched oxidation treatment at a preset first temperature. A protective layer is disposed on the upper surface of the dielectric layer. The wafer is then subjected to an annealing treatment. By passing oxidizing gas through the surface of the protective layer, oxygen ions in the oxidizing gas penetrate the dielectric layer to reach wafer surface. After high-temperature annealing treatment, the unsaturated bonds of the silicon atoms are bonded to the oxygen ions on the wafer surface, thereby improving the bonding of the dangling bonds on the wafer surface. | |||
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20 | WO2019192376A1 |
MANUFACTURING METHOD OF IMAGE SENSING DEVICE
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Publication/Patent Number: WO2019192376A1 | Publication Date: 2019-10-10 | Application Number: 2019080030 | Filing Date: 2019-03-28 | Inventor： Sun, Peng Wang, Xilong Hu sheng | Assignee: WUHAN XINXIN SEMICONDUCTOR MANUFACTURING CO., LTD. | IPC: H01L27/146 | Abstract: A manufacturing method of an image sensing device includes the following steps. A substrate is provided. At least one image sensing unit is disposed in the substrate. A passivation layer is formed on the substrate. An auxiliary layer is formed on the passivation layer. A material composition of the auxiliary layer is different from a material composition of the passivation layer. An annealing process is performed to the substrate and the passivation layer. The passivation layer is covered by the auxiliary layer during the annealing process. The auxiliary layer is removed after the annealing process. The ability to constrain and/or passivate free charge in and/or near the passivation layer may be enhanced by performing the annealing process with the auxiliary layer covering the passivation layer. The electrical performance of the image sensing device may be improved accordingly. |
3.Current Quota