| No. | Publication Number | Title | Publication/Patent Number Publication/Patent Number |
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Application Number Application Number |
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Inventor Inventor | Assignee Assignee |
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1 | US10699968B2 |
Semiconductor manufacturing apparatus
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Publication/Patent Number: US10699968B2 | Publication Date: 2020-06-30 | Application Number: 13/408,293 | Filing Date: 2012-02-29 | Inventor： Takeya, Yukari Iwamoto, Hayato Hagimoto, Yoshiya Motooka, Eizo | Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION | IPC: H01L21/66 | Abstract: A semiconductor manufacturing apparatus includes: a treatment chamber treating a treated film of a wafer using a desired chemical fluid; a film thickness measurement unit measuring an initial film thickness of the treated film before treatment and a final film thickness of the treated film after treatment; and a main body controlling unit calculating a treatment speed of the chemical fluid from the initial film thickness, the final film thickness, and a chemical fluid treatment time taken from the initial film thickness to the final film thickness to calculate a chemical fluid treatment time for a wafer to be treated next from the calculated treatment speed. | |||
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2 | EP3540776A3 |
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
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Publication/Patent Number: EP3540776A3 | Publication Date: 2020-01-08 | Application Number: 19173175.1 | Filing Date: 2014-12-12 | Inventor： Komai, Naoki Sasaki, Naoto Ogawa, Naoki Oinoue, Takashi Iwamoto, Hayato Ooka, Yutaka Nagata, Masaya | Assignee: Sony Corporation | IPC: H01L27/146 | Abstract: A semiconductor device (1) includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit (23) processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween. | |||
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3 | US10249665B2 |
Solid-state imaging device and method of manufacturing solid-state imaging device
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Publication/Patent Number: US10249665B2 | Publication Date: 2019-04-02 | Application Number: 12/805,090 | Filing Date: 2010-07-12 | Inventor： Yamamoto, Yuichi Iwamoto, Hayato | Assignee: Sony Corporation | IPC: H01L23/544 | Abstract: A solid state imaging device having a back-illuminated type structure in which a lens is formed on the back side of a silicon layer with a light-receiving sensor portion being formed thereon. Insulating layers are buried into the silicon layer around an image pickup region, with the insulating layer being buried around a contact layer that connects an electrode layer of a pad portion and an interconnection layer of the surface side. A method of manufacturing such a solid-state imaging device is also provided. | |||
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4 | EP3540776A2 |
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
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Publication/Patent Number: EP3540776A2 | Publication Date: 2019-09-18 | Application Number: 19173175.1 | Filing Date: 2014-12-12 | Inventor： Komai, Naoki Sasaki, Naoto Ogawa, Naoki Oinoue, Takashi Iwamoto, Hayato Ooka, Yutaka Nagata, Masaya | Assignee: Sony Corporation | IPC: H01L27/146 | Abstract: A semiconductor device (1) includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit (23) processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween. | |||
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5 | EP3084831B1 |
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
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Publication/Patent Number: EP3084831B1 | Publication Date: 2019-05-08 | Application Number: 14821306.9 | Filing Date: 2014-12-12 | Inventor： Komai, Naoki Sasaki, Naoto Ogawa, Naoki Oinoue, Takashi Iwamoto, Hayato Ooka, Yutaka Nagata, Masaya | Assignee: Sony Corporation | IPC: H01L27/146 |
