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1 | US2021020546A1 |
SEMICONDUCTOR DEVICE, IMAGING UNIT, AND ELECTRONIC APPARATUS
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Publication/Patent Number: US2021020546A1 | Publication Date: 2021-01-21 | Application Number: 16/978,576 | Filing Date: 2019-02-18 | Inventor： Kamei, Takahiro Ootsuka, Yoichi | Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION | IPC: H01L23/48 | Abstract: Provided is a semiconductor device having high planarity in an in-plane direction. This semiconductor device includes a semiconductor substrate, a first plating film pattern, a second plating film pattern, and an insulating layer. The semiconductor substrate has a first surface, and a second surface on a side opposite to the first surface. The first plating film pattern includes a first portion that covers a first regional portion of the first surface, and a second portion that is stacked to cover a portion of the first portion. The second plating film pattern includes a third portion that covers a second regional portion different from the first regional portion of the first surface, and also includes a fourth portion that is stacked to cover a portion of the third portion. A portion between the second portion and the fourth portion is filled with the insulating layer. | |||
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2 | WO2020017205A1 |
IMAGING ELEMENT AND ELECTRONIC DEVICE
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Publication/Patent Number: WO2020017205A1 | Publication Date: 2020-01-23 | Application Number: 2019023618 | Filing Date: 2019-06-14 | Inventor： Yoshida, Hirokazu Ishii, Wataru Matsuoka, Shinichi Kamei, Takahiro Ooka, Yutaka Masuda, Yoshiaki Saito, Sotetsu Sato, Naoki | Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION | IPC: H04N5/369 | Abstract: An imaging element according to one embodiment of the present invention includes: a sensor substrate which has a light-receiving region in which a plurality of light-receiving elements is arranged and a surrounding region provided around the light-receiving region; a sealing member that is disposed facing one side of the sensor substrate; a resin layer that bonds together the sensor substrate and the sealing member; and a recessed part which is provided in the surrounding region on the one side of the sensor substrate and which has the resin layer embedded therein. The resin layer has one or a plurality of voids on the inside of the recessed part in plan view. | |||
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3 | WO2019176454A1 |
SEMICONDUCTOR DEVICE, IMAGING APPARATUS, AND ELECTRONIC APPARATUS
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Publication/Patent Number: WO2019176454A1 | Publication Date: 2019-09-19 | Application Number: 2019005808 | Filing Date: 2019-02-18 | Inventor： Ootsuka, Yoichi Kamei, Takahiro | Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION | IPC: H04N5/369 | Abstract: Provided is a semiconductor device having high flatness in the in-surface direction. This semiconductor device has a semiconductor substrate, a first plating film pattern, a second plating film pattern, and an insulation layer. The semiconductor substrate has a first surface, and a second surface on the opposite side to the first surface. The first plating film pattern includes: a first portion that covers a first area portion in the first surface; and a second portion that is laminated so as to cover a part of the first portion. The second plating film pattern includes: a third portion that covers a second area portion different from the first area portion in the first surface; and a fourth portion that is laminated so as to cover a part of the third portion. The insulation layer fills a space between the second portion and the fourth portion. | |||
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4 | JP2019161046A |
SEMICONDUCTOR DEVICE, IMAGING APPARATUS, AND ELECTRONIC EQUIPMENT
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Publication/Patent Number: JP2019161046A | Publication Date: 2019-09-19 | Application Number: 2018046712 | Filing Date: 2018-03-14 | Inventor： Otsuka, Yoichi Kamei, Takahiro | Assignee: SONY SEMICONDUCTOR SOLUTIONS CORP | IPC: H04N5/369 | Abstract: To provide a semiconductor device having a high flatness in an in-plane direction.SOLUTION: The semiconductor device includes: a semiconductor substrate; a first plating film pattern; a second plating film pattern; and an insulation layer. The semiconductor substrate includes: a first surface; and a second surface on the side opposite to the first surface. The first plating film pattern includes: a first part covering a first region part of the first surface; and a second part laminated so as to cover a part of the first part. The second plating film pattern includes: a third part covering a second region part different from the first region part out of the first surface; and a fourth part laminated so as to cover a part of the third part. The insulation layer fills a gap between the second part and the fourth part.SELECTED DRAWING: Figure 1A | |||
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5 | US9419434B2 |
Power switching apparatus, power supply unit, and computer system
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Publication/Patent Number: US9419434B2 | Publication Date: 2016-08-16 | Application Number: 14/254,382 | Filing Date: 2014-04-16 | Inventor： Eguchi, Susumu Kamei, Takahiro | Assignee: FUJITSU LIMITED FUJITSU ADVANCED ENGINEERING LIMITED | IPC: H02J3/38 | Abstract: A power switching apparatus includes: a first input terminal to which first power is supplied; a second input terminal to which second power is supplied, the second power having a voltage that is lower than a voltage that the first power has; a first output terminal to supply to an outside the first power supplied to the first input terminal; and a second output terminal to supply to the outside the second power supplied to the second input terminal. First switching means manages the supplying of the second power from the first input terminal to the second output terminal. Second switching means manages the supplying of the second power from the second input terminal to the second output terminal. A processor manages the supplies of the first power and the second power using the first and second switching means. | |||
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6 | US8943963B2 |
Method for producing metal thin film
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Publication/Patent Number: US8943963B2 | Publication Date: 2015-02-03 | Application Number: 13/233,581 | Filing Date: 2011-09-15 | Inventor： Tanaka, Masanobu Ishihara, Hirotsugu Shimamura, Toshiki Kamei, Takahiro | Assignee: Sony Corporation | IPC: B41F1/00 | Abstract: A method for producing a metal thin film on a substrate includes: a step of applying an ink to a flat blanket; a first transfer step of bringing the first blanket and a letterpress having a predetermined pattern of projections into contact by a pressure compression while the flat blanked and the letterpress being disposed opposite each other, to selectively transfer a portion of the ink on the flat blanket corresponding to the projections to the letterpress; a second transfer step of bringing the flat blanket obtained after the first transfer step and the substrate into contact by pressure compression while the flat blanket and the substrate being disposed opposite each other, to transfer the ink remaining on the flat blanket to the substrate; and a step of subjecting the substrate obtained after the second transfer step to electroless plating to deposit a metal thin film on the substrate. | |||
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7 | US8943968B2 |
Method for producing metal thin film
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Publication/Patent Number: US8943968B2 | Publication Date: 2015-02-03 | Application Number: 13/346,051 | Filing Date: 2012-01-09 | Inventor： Tanaka, Masanobu Ishihara, Hirotsugu Shimamura, Toshiki Kamei, Takahiro | Assignee: Sony Corporation | IPC: B41F1/00 | Abstract: A method for producing a metal thin film on a substrate includes: a step of applying an ink to a flat blanket; a first transfer step of bringing the first blanket and a letterpress having a predetermined pattern of projections into contact by a pressure compression while the flat blanked and the letterpress being disposed opposite each other, to selectively transfer a portion of the ink on the flat blanket corresponding to the projections to the letterpress; a second transfer step of bringing the flat blanket obtained after the first transfer step and the substrate into contact by pressure compression while the flat blanket and the substrate being disposed opposite each other, to transfer the ink remaining on the flat blanket to the substrate; and a step of subjecting the substrate obtained after the second transfer step to electroless plating to deposit a metal thin film on the substrate. | |||
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8 | US2014225438A1 |
POWER SWITCHING APPARATUS, POWER SUPPLY UNIT, AND COMPUTER SYSTEM
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Publication/Patent Number: US2014225438A1 | Publication Date: 2014-08-14 | Application Number: 14/254,382 | Filing Date: 2014-04-16 | Inventor： Eguchi, Susumu Kamei, Takahiro | Assignee: FUJITSU LIMITED FUJITSU ADVANCED ENGINEERING LIMITED | IPC: H02J1/00 | Abstract: A power switching apparatus includes: a first input terminal to which first power is supplied; a second input terminal to which second power is supplied, the second power having a voltage that is lower than a voltage that the first power has; a first output terminal to supply to an outside the first power supplied to the first input terminal; and a second output terminal to supply to the outside the second power supplied to the second input terminal. First switching means manages the supplying of the second power from the first input terminal to the second output terminal. Second switching means manages the supplying of the second power from the second input terminal to the second output terminal. A processor manages the supplies of the first power and the second power using the first and second switching means. | |||
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9 | JP5380958B2 |
TRANSFER PATTERN FORMING METHOD AND TRANSFER PATTERN FORMING BLANKET
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Publication/Patent Number: JP5380958B2 | Publication Date: 2014-01-08 | Application Number: 2008227759 | Filing Date: 2008-09-05 | Inventor： Ishihara, Hiroshi Tanaka, Masanobu Shimamura, Toshiki Kamei, Takahiro | Assignee: SONY CORP | IPC: B41F17/14 | Abstract: PROBLEM TO BE SOLVED: To perform excellent transfer in both pattern transfer to a blanket and to a substrate. SOLUTION: This transfer pattern forming method includes: an application process for applying ink 2 to the surface of a PDMS (polydimethylsiloxane) layer 12 using the blanket 1 which is formed by laminating a hard base material 11 formed with a recess 11a and the PDMS layer 12 softer than the base material 11 and where the PDMS layer 12 is thicker in the position of the recess 11a than the other part; a first transfer process for using a plate 3 provided with a recess 3a in the position of a pattern to be formed | |||
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10 | JP5527454B2 |
TRANSFER DEVICE
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Publication/Patent Number: JP5527454B2 | Publication Date: 2014-06-18 | Application Number: 2013068654 | Filing Date: 2013-03-28 | Inventor： Ishihara, Hiroshi Tanaka, Masanobu Shimamura, Toshiki Kamei, Takahiro | Assignee: SONY CORP | IPC: B41F1/00 | Abstract: PROBLEM TO BE SOLVED: To provide a forming method of a metal thin film | |||
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11 | JP5195439B2 |
PRINTING METHOD AND METHOD OF MANUFACTURING DISPLAY DEVICE
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Publication/Patent Number: JP5195439B2 | Publication Date: 2013-05-08 | Application Number: 2009001248 | Filing Date: 2009-01-07 | Inventor： Tanaka, Masanobu Kamei, Takahiro | Assignee: SONY CORP | IPC: B41F17/14 | Abstract: PROBLEM TO BE SOLVED: To provide a printing method which can make a clear-cut printing compared with the conventional method | |||
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12 | US8381649B2 |
Printing method and display apparatus manufacturing method
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Publication/Patent Number: US8381649B2 | Publication Date: 2013-02-26 | Application Number: 12/646,476 | Filing Date: 2009-12-23 | Inventor： Tanaka, Masanobu Kamei, Takahiro | Assignee: Sony Corporation | IPC: B41F16/00 | Abstract: A printing method including the steps of, forming a transfer layer on a blanket, forming a groove portion on the transfer layer by pressing a protrusion portion of a mold member including the protrusion portion having a predetermined pattern against the transfer layer, the groove portion having the pattern corresponding to the protrusion portion, forming a print pattern layer on the blanket by causing the transfer layer on the blanket and a relief printing plate including a convex portion having a pattern corresponding to a reverse pattern of the protrusion portion to face each other and pressure-contacting them so that a portion on the transfer layer corresponding to the convex portion is selectively eliminated, and transferring the print pattern layer onto a substrate to be printed by causing the print pattern layer on the blanket and the substrate to be printed to face each other and pressure-contacting them. | |||
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13 | WO2013065136A1 |
POWER SUPPLY SWITCHING DEVICE
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Publication/Patent Number: WO2013065136A1 | Publication Date: 2013-05-10 | Application Number: 2011075229 | Filing Date: 2011-11-01 | Inventor： Kamei, Takahiro Eguchi, Susumu | Assignee: Fujitsu Limited KAMEI, TAKAHIRO FUJITSU ADVANCED ENGINEERING LIMITED EGUCHI, SUSUMU | IPC: G06F1/26 | Abstract: One system to which the present invention has been applied is predicated on being provided with: a first input terminal to which a first power is supplied; a second input terminal to which a second power of a lower voltage than the first power is supplied; a first output terminal for supplying | |||
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14 | JP5376136B2 |
METHOD AND DEVICE FOR FORMING PATTERN
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Publication/Patent Number: JP5376136B2 | Publication Date: 2013-12-25 | Application Number: 2009090175 | Filing Date: 2009-04-02 | Inventor： Ishihara, Hiroshi Tanaka, Masanobu Kamei, Takahiro Chin, Kaisho | Assignee: SONY CORP | IPC: B05C11/04 | Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a pattern which can highly precisely form a high-definition pattern. SOLUTION: A hollow 17 is formed as a template structure 18 on a substrate 11 | |||
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15 | JP5177260B2 |
PATTERN TRANSFER METHOD
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Publication/Patent Number: JP5177260B2 | Publication Date: 2013-04-03 | Application Number: 2011168000 | Filing Date: 2011-08-01 | Inventor： Ishihara, Hiroshi Tanaka, Masanobu Shimamura, Toshiki Kamei, Takahiro | Assignee: SONY CORP | IPC: H05K3/12 | Abstract: PROBLEM TO BE SOLVED: To provide a forming method of a metal thin film which can be made finer and higher in yield than before | |||
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16 | JP2013154643A |
TRANSFER DEVICE
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Publication/Patent Number: JP2013154643A | Publication Date: 2013-08-15 | Application Number: 2013068654 | Filing Date: 2013-03-28 | Inventor： Ishihara, Hiroshi Tanaka, Masanobu Shimamura, Toshiki Kamei, Takahiro | Assignee: SONY CORP | IPC: B41F1/00 | Abstract: PROBLEM TO BE SOLVED: To provide a forming method of a metal thin film | |||
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17 | JP2013032022A |
TRANSFER DEVICE
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Publication/Patent Number: JP2013032022A | Publication Date: 2013-02-14 | Application Number: 2012249304 | Filing Date: 2012-11-13 | Inventor： Ishihara, Hiroshi Tanaka, Masanobu Shimamura, Toshiki Kamei, Takahiro | Assignee: SONY CORP | IPC: B41F1/00 | Abstract: PROBLEM TO BE SOLVED: To provide a method of forming a metal thin film | |||
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18 | KR101222420B1 |
METHOD FOR MAKING THIN-FILM SEMICONDUCTOR DEVICE
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Publication/Patent Number: KR101222420B1 | Publication Date: 2013-01-16 | Application Number: 20050091280 | Filing Date: 2005-09-29 | Inventor： Machida, Akio Akao, Hirotaka Nakao, Isamu Kamei, Takahiro | Assignee: Sony Corporation | IPC: H01L29/786 | ||||
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19 | US8394728B2 |
Film deposition method and manufacturing method of semiconductor device
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Publication/Patent Number: US8394728B2 | Publication Date: 2013-03-12 | Application Number: 12/694,342 | Filing Date: 2010-01-27 | Inventor： Akao, Hirotaka Kaino, Yuriko Kamei, Takahiro Hara, Masaki Kurihara, Kenichi | Assignee: Sony Corporation | IPC: H01L21/469 | Abstract: A film deposition method includes the steps of: coating a solution containing a polysilane compound on a substrate to form a coating film and then carrying out a first thermal treatment in an inert atmosphere, thereby forming the coating film into a silicon film; forming a coating film containing a polysilane compound on the silicon film and then carrying out a second thermal treatment in an inert atmosphere or a reducing atmosphere, thereby forming the coating film into a silicon oxide precursor film; and carrying out a third thermal treatment in an oxidizing atmosphere, thereby forming the silicon oxide precursor film into a silicon oxide film and simultaneously densifying the silicon film. | |||
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20 | JP4904221B2 |
SENSOR ASSEMBLY
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Publication/Patent Number: JP4904221B2 | Publication Date: 2012-03-28 | Application Number: 2007207081 | Filing Date: 2007-08-08 | Inventor： Kamei, Takahiro Eguchi, Yoshimasa | Assignee: HONDA MOTOR CO LTD | IPC: B60R19/48 | Abstract: PROBLEM TO BE SOLVED: To provide a sensor assembly capable of precisely detecting the load at crash. SOLUTION: The sensor assembly 10 comprises sensor elements 47 |
3.Current Quota