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1 | US2021020462A1 |
SUBSTRATE CLEANING APPARATUS AND SUBSTRATE CLEANING METHOD USING THE SAME
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Publication/Patent Number: US2021020462A1 | Publication Date: 2021-01-21 | Application Number: 16/739,409 | Filing Date: 2020-01-10 | Inventor： Jeong, Jihoon Park, Mihyun Ko, Yongsun Lee, Kwangwook Lee, Kuntack Jeon, Hayoung Cho, Yongjhin Cha, Jihoon | Assignee: SAMSUNG ELECTRONICS CO., LTD. | IPC: H01L21/67 | Abstract: A substrate cleaning apparatus includes a support inside a chamber to hold a substrate, a first supply source inside the chamber that includes a first nozzle along a first direction and facing an upper surface of the support, the first nozzle to spray polymer and solvent onto the substrate to form a coating, and a second nozzle at an oblique angle to the first direction and facing an edge of the support to inject a hot gas toward the coating to volatilize the solvent, a second supply source inside the chamber and having a third nozzle facing the upper surface of the support to inject a peeling treatment to the coating to peel the coating from the substrate, and a third supply source inside the chamber and facing a lower surface of the support to inject the hot gas to heat a second surface of the substrate. | |||
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2 | US10580617B2 |
Method and apparatus for plasma etching
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Publication/Patent Number: US10580617B2 | Publication Date: 2020-03-03 | Application Number: 15/841,230 | Filing Date: 2017-12-13 | Inventor： Park, Kijong Yang, Jun-youl Ko, Yongsun Kim, Kyunghyun Kim, Taeheon Shin, Jae Jin | Assignee: Samsung Electronics Co., Ltd. | IPC: H01J37/32 | Abstract: A plasma etching apparatus includes an etching chamber and at least one processor. The etching chamber is configured to support a target therein. The at least one processor is configured to: determine a process condition for plasma etching the target before execution of a plasma etching process; and control an aspect of the chamber according to the process condition. The process condition includes a unit etching time over which the plasma etching process is to be continuously performed. | |||
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3 | US2020227253A1 |
SUPERCRITICAL DRYING APPARATUS AND METHOD OF DRYING SUBSTRATE USING THE SAME
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Publication/Patent Number: US2020227253A1 | Publication Date: 2020-07-16 | Application Number: 16/561,078 | Filing Date: 2019-09-05 | Inventor： Park, Sangjine Cho, Byung-kwon Jeong, Jihoon Kim, Youngtak Ko, Yongsun Jeon, Seulgee | Assignee: SAMSUNG ELECTRONICS CO., LTD. | IPC: H01L21/02 | Abstract: A supercritical drying apparatus and a method of drying a substrate, the apparatus including a drying chamber configured to receive a supercritical fluid and to dry a substrate; a chuck in the drying chamber, the chuck being configured to receive the substrate; and a particle remover in the drying chamber, the particle remover being configured to remove dry particles from the substrate by heating the substrate with radiant heat. | |||
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4 | US2020388484A1 |
WAFER CLEANING APPARATUS BASED ON LIGHT IRRADIATION AND WAFER CLEANING SYSTEM INCLUDING THE SAME
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Publication/Patent Number: US2020388484A1 | Publication Date: 2020-12-10 | Application Number: 16/744,667 | Filing Date: 2020-01-16 | Inventor： Cho, Byungkwon Park, Sangjine Ko, Yongsun Jeon, Seulgee Jeong, Jihoon Hong, Seongsik | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L21/02 | Abstract: Provided are a wafer cleaning apparatus based on light irradiation capable of effectively cleaning residue on a wafer without damaging the wafer, and a wafer cleaning system including the cleaning apparatus. The wafer cleaning apparatus is configured to clean residue on the wafer by light irradiation and includes: a light irradiation unit configured to irradiate light onto the wafer during the light irradiation; a wafer processing unit configured accommodate the wafer and to control a position of the wafer such that the light is irradiated onto the wafer during the light irradiation; and a cooling unit configured to cool the wafer after the light irradiation has been completed. The light irradiation unit, the wafer processing unit, and the cooling unit are sequentially arranged in a vertical structure with the light irradiation unit above the wafer processing unit and the wafer processing unit above the cooling unit. | |||
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5 | EP3255661B1 |
SUBSTRATE TREATMENT METHOD USING SUPERCRITICAL FLUID
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Publication/Patent Number: EP3255661B1 | Publication Date: 2020-07-01 | Application Number: 17177554.7 | Filing Date: 2014-03-07 | Inventor： Cho, Yong-jhin Ko, Yongsun Kim, Kyoungseob Kim, Kwangsu Kim, Seokhoon Oh, Jung-min Lee, Kuntack Jang, Wonho Jun, Yongmyung | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L21/67 | ||||
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6 | US10361100B2 |
Apparatus and methods for treating a substrate
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Publication/Patent Number: US10361100B2 | Publication Date: 2019-07-23 | Application Number: 15/368,988 | Filing Date: 2016-12-05 | Inventor： Lee, Hyosan Ko, Yongsun Kim, Kyoungseob Kim, Kwangsu Kim, Seokhoon Lee, Kuntack Jun, Yongmyung Cho, Yong-jhin | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L21/67 | Abstract: A substrate treatment apparatus is provided. The apparatus may include a process chamber configured to have an internal space, a substrate supporting member disposed in the process chamber to support a substrate, a first supplying port configured to supply a supercritical fluid to a region of the internal space located below the substrate, a second supplying port configured to supply a supercritical fluid to other region of the internal space located over the substrate, and an exhaust port configured to exhaust the supercritical fluid from the process chamber to an exterior region. | |||
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7 | US10242880B2 |
Method of wet etching and method of fabricating semiconductor device using the same
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Publication/Patent Number: US10242880B2 | Publication Date: 2019-03-26 | Application Number: 15/645,419 | Filing Date: 2017-07-10 | Inventor： Kim, Kwangsu Cha, Se-ho Ko, Yongsun Kim, Keonyoung Kim, Kyunghyun Mun, Changsup Seong, Choongkee Song, Sunjoong Lee, Jinwoo Han, Hoon | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L21/311 | Abstract: Disclosed are a method of wet etching and a method of fabricating a semiconductor device. The wet etching method includes providing a wafer in a process bath and an etchant is accommodated, supplying the process bath with a primary etchant to control a concentration of a specific material in the etchant, supplying the process bath with a first additive to increase the concentration of the specific material in the etchant, and supplying the process bath with a second additive to suppress a defect caused by an increase in the concentration of the specific material in the etchant. The etchant includes at least one, of the primary etchant, the first additive, and the second additive. The first additive and the second additive are separately supplied to the process bath. | |||
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8 | US9859432B2 |
Semiconductor devices having spacer protection pattern
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Publication/Patent Number: US9859432B2 | Publication Date: 2018-01-02 | Application Number: 15/245,549 | Filing Date: 2016-08-24 | Inventor： Han, Jeongnam Ko, Yongsun Pae, Sangwoo Yeo, Kyounghwan Ko, Yongsun | Assignee: Samsung Electronics Co., Ltd. Samsung Electronics, Inc. | IPC: H01L29/423 | Abstract: A semiconductor device may include a pair of active patterns spaced apart from each other in a first direction, a pair of gate electrodes intersecting the pair of the active patterns in a second direction crossing the first direction, gate spacers on sidewalls of the pair of the active patterns, source/drain regions on the pair active patterns between the pair of the gate electrodes, and a spacer protection pattern between the pair of the gate electrodes and between the pair of the active patterns. The spacer protection pattern may be commonly connected to the gate spacers. | |||
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9 | US10084051B2 |
Semiconductor devices including field effect transistors and methods of fabricating the same
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Publication/Patent Number: US10084051B2 | Publication Date: 2018-09-25 | Application Number: 15/133,424 | Filing Date: 2016-04-20 | Inventor： Park, Sangjine Lee, Jae-hwan Ko, Yongsun | Assignee: SAMSUNG ELECTRONICS CO., LTD. | IPC: H01L29/78 | Abstract: A semiconductor device includes a fin structure on a substrate, device isolation patterns on the substrate at opposite sides of the fin structure, a gate electrode intersecting the fin structure and the device isolation patterns, a gate dielectric pattern between the gate electrode and the fin structure and between the gate electrode and the device isolation patterns, and gate spacers on opposite sidewalls of the gate electrode, wherein, on each of the device isolation patterns, a bottom surface of the gate dielectric pattern is at a higher level than bottom surfaces of the gate spacers. | |||
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10 | US10096453B2 |
Method and apparatus for plasma etching
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Publication/Patent Number: US10096453B2 | Publication Date: 2018-10-09 | Application Number: 15/133,989 | Filing Date: 2016-04-20 | Inventor： Park, Kijong Yang, Jun-youl Ko, Yongsun Kim, Kyunghyun Kim, Taeheon Shin, Jae Jin | Assignee: Samsung Electronics Co., Ltd. | IPC: H01J37/32 | Abstract: A plasma etching apparatus includes an etching chamber and at least one processor. The etching chamber is configured to support a target therein. The at least one processor is configured to: determine a process condition for plasma etching the target before execution of a plasma etching process; and control an aspect of the chamber according to the process condition. The process condition includes a unit etching time over which the plasma etching process is to be continuously performed. | |||
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11 | US9934959B2 |
Method and apparatus for purifying cleaning agent
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Publication/Patent Number: US9934959B2 | Publication Date: 2018-04-03 | Application Number: 14/537,318 | Filing Date: 2014-11-10 | Inventor： Cho, Yong-jhin Oh, Jung-min Jun, Yongmyung Ko, Yongsun Lee, Kuntack Lee, Hyosan | Assignee: SAMSUNG ELECTRONICS CO., LTD. | IPC: H01L21/02 | Abstract: A method of purifying a cleaning agent is provided. The method includes heating a first mixed solution including an etching agent, a first cleaning agent, and a second cleaning agent at or below a first temperature and distilling the etching agent and the first cleaning agent and removing the second cleaning agent. The method includes condensing or compressing the etching agent and the first cleaning agent forming a second mixed solution including the etching agent and the first cleaning agent. The method includes heating the second mixed solution at a temperature lower than a second temperature, redistilling the etching agent and extracting the first cleaning agent. The second temperature is lower than the first temperature. | |||
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12 | US2018102235A1 |
METHOD AND APPARATUS FOR PLASMA ETCHING
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Publication/Patent Number: US2018102235A1 | Publication Date: 2018-04-12 | Application Number: 15/841,230 | Filing Date: 2017-12-13 | Inventor： Shin, Jae Jin Kim, Taeheon Kim, Kyunghyun Ko, Yongsun Yang, Jun-youl Park, Kijong | Assignee: Samsung Electronics Co., Ltd. | IPC: H01J37/32 | Abstract: A plasma etching apparatus includes an etching chamber and at least one processor. The etching chamber is configured to support a target therein. The at least one processor is configured to: determine a process condition for plasma etching the target before execution of a plasma etching process; and control an aspect of the chamber according to the process condition. The process condition includes a unit etching time over which the plasma etching process is to be continuously performed. | |||
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13 | US10128120B2 |
Method of treating a layer
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Publication/Patent Number: US10128120B2 | Publication Date: 2018-11-13 | Application Number: 15/242,190 | Filing Date: 2016-08-19 | Inventor： Kim, Kwangsu Park, Byoung Jae Ko, Yongsun Kim, Kyunghyun Mun, Changsup Park, Kijong | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L21/3065 | Abstract: The inventive concepts provide a method of completely removing a damage region of a surface of an etch target layer after plasma-etching the etch target layer. The method includes performing a first post-etch plasma treatment process using a first post-treatment gas on the plasma-etched etch target layer. A polarity of ions of the first post-treatment gas may be the same as a polarity of bias power applied to a stage in a plasma apparatus. | |||
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14 | US9941110B2 |
Manufacturing method and fluid supply system for treating substrate
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Publication/Patent Number: US9941110B2 | Publication Date: 2018-04-10 | Application Number: 15/350,983 | Filing Date: 2016-11-14 | Inventor： Oh, Jung-min Lee, Hyosan Ko, Yongsun Kim, Kyoungseob Kim, Seokhoon Lee, Kuntack Jun, Yongmyung Cho, Yong-jhin | Assignee: SAMSUNG ELECTRONICS CO., LTD. | IPC: H01L21/67 | Abstract: A method of manufacture and fluid supply system for treating a substrate is provided. The fluid supply system for treating a substrate may include a substrate dry part supplying a dry fluid to dry a rinse solution doped on a substrate; a dry fluid separation part retrieving a mixed fluid that the dry fluid and the rinse solution are mixed with each other during a dry process of the substrate from the substrate dry part and separating the dry fluid from the mixed fluid; and a dry fluid supply part resupplying the dry fluid separated from the dry fluid separation part to the substrate dry part. | |||
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15 | US10155903B2 |
Metal etchant compositions and methods of fabricating a semiconductor device using the same
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Publication/Patent Number: US10155903B2 | Publication Date: 2018-12-18 | Application Number: 15/075,709 | Filing Date: 2016-03-21 | Inventor： Lee, Hyosan Ko, Yongsun Kim, Kyoungseob Lee, Kuntack Jeong, Jihoon Lin, Chen Ober, Christopher K. | Assignee: Samsung Electronics Co., Ltd. Cornell University | IPC: B44C1/22 | Abstract: The present inventive concepts provide metal etchant compositions and methods of fabricating a semiconductor device using the same. The metal etchant composition includes an organic peroxide in a range of about 0.1 wt % to about 20 wt %, an organic acid in a range of about 0.1 wt % to about 70 wt %, and an alcohol-based solvent in a range of about 10 wt % to about 99.8 wt %. The metal etchant composition may be used in an anhydrous system. | |||
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16 | US2018102254A1 |
Method of Wet Etching and Method of Fabricating Semiconductor Device Using the Same
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Publication/Patent Number: US2018102254A1 | Publication Date: 2018-04-12 | Application Number: 15/645,419 | Filing Date: 2017-07-10 | Inventor： Han, Hoon Lee, Jinwoo Song, Sunjoong Seong, Choongkee Mun, Changsup Kim, Kyunghyun Kim, Keonyoung Ko, Yongsun Cha, Se-ho Kim, Kwangsu | Assignee: HAN, Hoon LEE, Jinwoo SONG, Sunjoong SEONG, Choongkee MUN, ChangSup KIM, Kyunghyun KIM, Keonyoung KO, Yongsun CHA, Se-Ho Kim, Kwangsu | IPC: H01L27/11582 | Abstract: Disclosed are a method of wet etching and a method of fabricating a semiconductor device. The wet etching method includes providing a wafer in a process bath and an etchant is accommodated, supplying the process bath with a primary etchant to control a concentration of a specific material in the etchant, supplying the process bath with a first additive to increase the concentration of the specific material in the etchant, and supplying the process bath with a second additive to suppress a defect caused by an increase in the concentration of the specific material in the etchant. The etchant includes at least one, of the primary etchant, the first additive, and the second additive. The first additive and the second additive are separately supplied to the process bath, | |||
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17 | DE102016119492A1 |
Halbleitervorrichtungen
Title (English):
semiconductor device
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Publication/Patent Number: DE102016119492A1 | Publication Date: 2017-06-01 | Application Number: 102016119492 | Filing Date: 2016-10-13 | Inventor： Ko, Yongsun Han, Jeongnam Cho, Hagju Park, Byungjae Park, Sangjine | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L21/8234 | Abstract: Eine Halbleitervorrichtung kann ein Paar von aktiven Strukturen (AP) beabstandet voneinander in einer ersten Richtung (D1) aufweisen | |||
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18 | US2017154991A1 |
Semiconductor Devices
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Publication/Patent Number: US2017154991A1 | Publication Date: 2017-06-01 | Application Number: 15/245,549 | Filing Date: 2016-08-24 | Inventor： Ko, Yongsun Park, Sangjine Cho, Hagju Park, Byungjae Han, Jeongnam | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L29/78 | Abstract: A semiconductor device may include a pair of active patterns spaced apart from each other in a first direction, a pair of gate electrodes intersecting the pair of the active patterns in a second direction crossing the first direction, gate spacers on sidewalls of the pair of the active patterns, source/drain regions on the pair active patterns between the pair of the gate electrodes, and a spacer protection pattern between the pair of the gate electrodes and between the pair of the active patterns. The spacer protection pattern may be commonly connected to the gate spacers. | |||
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19 | US9589901B2 |
Semiconductor wafers including indications of crystal orientation and methods of forming the same
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Publication/Patent Number: US9589901B2 | Publication Date: 2017-03-07 | Application Number: 14/519,788 | Filing Date: 2014-10-21 | Inventor： Koo, Tae-hyoung Choi, Samjong Lee, Dongjun Ko, Yongsun | Assignee: Samsung Electronics Co., Ltd. | IPC: H01L23/544 | Abstract: A wafer can be provided to include a single crystalline semiconductor material with a predetermined crystal orientation. The wafer can include a laser mark at a determined position on a front surface or on a back surface of the wafer, where the determined position is configured to indicate the predetermined crystal orientation of the single crystalline semiconductor material. | |||
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20 | US9595434B2 |
Apparatus and methods for manufacturing semiconductor devices and treating substrates
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Publication/Patent Number: US9595434B2 | Publication Date: 2017-03-14 | Application Number: 14/704,912 | Filing Date: 2015-05-05 | Inventor： Kim, Kyoungseob Ko, Yongsun Kim, Kyoung Hwan Kim, Seokhoon Lee, Kuntack Lee, Hyosan | Assignee: SAMSUNG ELECTRONICS CO., LTD. | IPC: H01L21/00 | Abstract: A method of manufacturing a semiconductor device includes: forming a pattern on a surface of a semiconductor substrate; placing the substrate on a platform of a substrate treatment apparatus; rotating the wafer while applying a cleaning liquid from a first nozzle and a wetting liquid from a second nozzle to treat a first region on the surface of the substrate; vertically changing the distance of the second nozzle together with the first nozzle with respect to the platform; after the vertical change, rotating the wafer while applying the cleaning liquid from the first nozzle and the wetting liquid from the second nozzle to treat a second region on the surface of the substrate; and forming a semiconductor device from the treated substrate. |
3.Current Quota