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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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1
US2020012081A1
CAMERA MODULE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
Publication/Patent Number: US2020012081A1 Publication Date: 2020-01-09 Application Number: 16/490,994 Filing Date: 2018-03-02 Inventor: Komai, Naoki   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: G02B13/00 Abstract: There is provided a camera module including a first lens substrate having a light-incident side. The first lens substrate includes a lens disposed at an inner side of a through-hole of the first lens substrate, and a wiring layer disposed at an opposite side of the light-incident side of the first lens substrate. The camera module may include an imaging element including a pixel array disposed at a light-incident side of a substrate, where the imaging element is electrically connected to the wiring layer of the first lens substrate, and where a width of the imaging element in a direction parallel to the light-incident surface of the imaging element is smaller than a width of the first lens substrate in the direction parallel to the light-incident surface of the first lens substrate.
2
US202012081A1
CAMERA MODULE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
Publication/Patent Number: US202012081A1 Publication Date: 2020-01-09 Application Number: 20/181,649 Filing Date: 2018-03-02 Inventor: Komai, Naoki   Assignee: Sony Semiconductor Solutions Corporation   IPC: H01L27/146 Abstract: There is provided a camera module including a first lens substrate having a light-incident side. The first lens substrate includes a lens disposed at an inner side of a through-hole of the first lens substrate, and a wiring layer disposed at an opposite side of the light-incident side of the first lens substrate. The camera module may include an imaging element including a pixel array disposed at a light-incident side of a substrate, where the imaging element is electrically connected to the wiring layer of the first lens substrate, and where a width of the imaging element in a direction parallel to the light-incident surface of the imaging element is smaller than a width of the first lens substrate in the direction parallel to the light-incident surface of the first lens substrate.
3
EP3540776A3
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3540776A3 Publication Date: 2020-01-08 Application Number: 19173175.1 Filing Date: 2014-12-12 Inventor: Komai, Naoki   Sasaki, Naoto   Ogawa, Naoki   Oinoue, Takashi   Iwamoto, Hayato   Ooka, Yutaka   Nagata, Masaya   Assignee: Sony Corporation   IPC: H01L27/146 Abstract: A semiconductor device (1) includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit (23) processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween.
4
EP3706169A1
BACKSIDE IRRADIATION TYPE SOLID-STATE IMAGING DEVICE, METHOD FOR MANUFACTURING BACKSIDE IRRADIATION TYPE SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3706169A1 Publication Date: 2020-09-09 Application Number: 18872679.8 Filing Date: 2018-10-16 Inventor: Takachi, Taizo   Yamamoto, Yuichi   Saito, Suguru   Wakiyama, Satoru   Ootsuka, Yoichi   Komai, Naoki   Takimoto, Kaori   Iijima, Tadashi   Haneda, Masaki   Nagata, Masaya   Assignee: Sony Semiconductor Solutions Corporation   IPC: H01L27/146 Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.
5
US2020258924A1
BACKSIDE ILLUMINATION TYPE SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD FOR BACKSIDE ILLUMINATION TYPE SOLID-STATE IMAGING DEVICE, IMAGING APPARATUS AND ELECTRONIC EQUIPMENT
Publication/Patent Number: US2020258924A1 Publication Date: 2020-08-13 Application Number: 16/758,535 Filing Date: 2018-10-16 Inventor: Takachi, Taizo   Yamamoto, Yuichi   Saito, Suguru   Wakiyama, Satoru   Ootsuka, Yoichi   Komai, Naoki   Takimoto, Kaori   Iijima, Tadashi   Haneda, Masaki   Nagata, Masaya   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.
6
US2019221602A1
SOLID STATE IMAGING DEVICE, SOLID STATE IMAGING DEVICE MANUFACTURING METHOD, AND ELECTRONIC APPARATUS
Publication/Patent Number: US2019221602A1 Publication Date: 2019-07-18 Application Number: 16/329,454 Filing Date: 2017-08-25 Inventor: Komai, Naoki   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: The present disclosure relates to a solid state imaging device capable of further decreasing a chip size, a solid state imaging device manufacturing method, and an electronic apparatus. A solid state imaging device includes: a semiconductor substrate with a pixel region on which a plurality of pixels is arranged in a planar manner; a wiring layer that is laminated on the semiconductor substrate and is provided with wiring connected to the plurality of pixels; and a support substrate that is bonded to the wiring layer. A plurality of electrode pads used to be electrically connected to an outside is arranged at positions overlapping the pixel region in the wiring layer, and through-holes are provided at positions corresponding to the plurality of electrode pads in the support substrate. The present technology can be applied to, for example, a back side irradiation type CMOS image sensor of a wafer level CSP.
7
KR20190127717A
카메라 모듈 및 그 제조 방법, 및 전자기기
Publication/Patent Number: KR20190127717A Publication Date: 2019-11-13 Application Number: 20197026592 Filing Date: 2018-03-02 Inventor: Komai, Naoki   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: 광입사면 측을 갖는 제1 렌즈 기판을 포함하는 카메라 모듈이 제공된다. 상기 제1 렌즈 기판은 상기 제1 렌즈 기판의 관통공의 내측에 배치된 렌즈, 및 상기 제1 렌즈 기판의 상기 광입사면 측과는 반대 측에 배치된 배선층을 포함한다. 상기 카메라 모듈은, 기판의 광입사면 측에 배치된 화소 어레이를 포함하는 촬상 소자를 포함할 수 있으며, 상기 촬상 소자는 상기 제1 렌즈 기판의 상기 배선층에 전기적으로 접속되어 있으며, 상기 촬상 소자의 상기 광입사면에 평행한 방향에 있어서 상기 촬상 소자의 폭은, 상기 제1 렌즈 기판의 상기 광입사면에 평행한 방향에 있어서 상기 제1 렌즈 기판의 폭보다 작다.
8
KR20190045187A
고체 촬상 소자 및 제조 방법, 및 전자 기기
Publication/Patent Number: KR20190045187A Publication Date: 2019-05-02 Application Number: 20197005817 Filing Date: 2017-08-25 Inventor: Komai, Naoki   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: 본 개시는, 칩 사이즈의 소형화를 더욱 도모할 수 있도록 하는 고체 촬상 소자 및 제조 방법, 및 전자 기기에 관한 것이다. 고체 촬상 소자는, 복수의 화소가 평면적으로 배치된 화소 영역이 설치되는 반도체 기판과, 반도체 기판에 대해 적층되어 복수의 화소에 접속되는 배선이 설치되는 배선층과, 배선층에 대해 접합되어 반도체 기판을 지지하는 지지 기판을 구비한다. 그리고, 배선층에는, 반도체 기판을 평면적으로 보았을 때 화소 영역과 겹쳐지는 위치에서, 외부와의 전기적인 접속에 사용되는 복수의 전극 패드가 배치되고 지지 기판에는, 복수의 전극 패드에 대응되는 개소에 관통공이 설치된다. 본 기술은, 예를 들면, 웨이퍼 레벨 CSP의 이면 조사형 CMOS 이미지 센서에 적용할 수 있다.
9
JP2019163137A
CARRYING VEHICLE
Publication/Patent Number: JP2019163137A Publication Date: 2019-09-26 Application Number: 2018052231 Filing Date: 2018-03-20 Inventor: Inaba, Yoshiaki   Komai, Naoki   Assignee: ISHIDA CO LTD   IPC: B65G1/137 Abstract: To provide a carrying vehicle which assists a vehicle speed control by an operator.SOLUTION: A carrying vehicle 1 has a first placing part 25A to a third placing part 25C on which an article is placed, and travels by an operator's pushing by hands. The carrying vehicle 1 comprises a vehicle speed sensor 6 for detecting a vehicle speed of the carrying vehicle 1, a display unit 8 for informing the operator of the vehicle speed, and a control unit 7 for controlling the display of the display unit 8. The control unit 7 changes the display mode of the display unit 8 according to the vehicle speed detected by the vehicle speed sensor 6.SELECTED DRAWING: Figure 1
10
EP3540776A2
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3540776A2 Publication Date: 2019-09-18 Application Number: 19173175.1 Filing Date: 2014-12-12 Inventor: Komai, Naoki   Sasaki, Naoto   Ogawa, Naoki   Oinoue, Takashi   Iwamoto, Hayato   Ooka, Yutaka   Nagata, Masaya   Assignee: Sony Corporation   IPC: H01L27/146 Abstract: A semiconductor device (1) includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit (23) processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween.