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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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1
EP3790046A1
THROUGH-SUBSTRATE VIA AND METHOD FOR MANUFACTURING A THROUGH-SUBSTRATE VIA
Publication/Patent Number: EP3790046A1 Publication Date: 2021-03-10 Application Number: 19195145.8 Filing Date: 2019-09-03 Inventor: Parteder, Georg   Kraft, Jochen   Jessenig, Stefan   Assignee: AMS AG   IPC: H01L23/48 Abstract: An open through-substrate via (1), TSV, comprises an insulation layer (20) disposed adjacent to at least a portion of side walls (15) of a trench (14) and to a surface (13) of a substrate body (10). The TSV further comprises a metallization layer (30) disposed adjacent to at least a portion of the insulation layer (20) and to at least a portion of a bottom wall (16) of said trench (14), a redistribution layer (40) disposed adjacent to at least a portion of the metallization layer (30) and a portion of the insulation layer (20) disposed adjacent to the surface (13), and a capping layer (50) disposed adjacent to at least a portion of the metallization layer (30) and to at least a portion of the redistribution layer (40). The insulation layer (20) and/or the capping layer (50) comprise sublayers (21, 22, 51, 52) that are distinct from each other in terms of material properties. A first of the sublayers (21, 51) is disposed adjacent to at least a portion of the side walls (15) and to at least a portion of the surface (13) and a second of the sublayers (22, 52) is disposed adjacent to at least a portion of the surface (13).
2
EP3789805A1
BONDED STRUCTURE AND METHOD FOR MANUFACTURING A BONDED STRUCTURE
Publication/Patent Number: EP3789805A1 Publication Date: 2021-03-10 Application Number: 19195378.5 Filing Date: 2019-09-04 Inventor: Kraft, Jochen   Stering, Bernhard   Steele, Colin   Seurin, Jean Francois   Assignee: AMS AG   IPC: G02B6/42 Abstract: A bonded structure (1) comprises a substrate component (20) having a plurality of first pads (21) arranged on or within a surface (22) of the substrate component (20), and an integrated circuit component (10) having a plurality of second pads (11) arranged on or within a surface (12) of the integrated circuit component (10). The bonded structure (1) further comprises a plurality of connection elements (31) physically connecting the first pads (21) to the second pads (11). The surface (12) of the integrated circuit component (10) is tilted obliquely to the surface (22) of the substrate component (22) at a tilt angle (α) that results from nominal variations of surface sizes of the first and second pads (21, 11) .
3
US2021175153A1
SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA
Publication/Patent Number: US2021175153A1 Publication Date: 2021-06-10 Application Number: 17/052,452 Filing Date: 2019-03-20 Inventor: Kraft, Jochen   Parteder, Georg   Pires, Singulani Anderson   Coppeta, Raffaele   Schrank, Franz   Assignee: ams AG   IPC: H01L23/48 Abstract: A semiconductor device includes a semiconductor body, an electrically conductive via which extends through at least a part of the semiconductor body, and where the via has a top side and a bottom side that faces away from the top side, an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to a lateral direction, where the lateral direction is perpendicular to a vertical direction given by the main axis of extension of the via, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the lateral direction. The etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction, the lateral extent in the lateral direction of the etch-stop layer amounts to at least 2.5 times the lateral extent of the via in the lateral direction, and the lateral extent of the contact layer is smaller than the lateral extent of the via or the lateral extent of the contact layer amounts to at least 2.5 times the lateral extent of the via.
4
EP2889901B1
Semiconductor device with through-substrate via and corresponding method
Publication/Patent Number: EP2889901B1 Publication Date: 2021-02-03 Application Number: 13199683.7 Filing Date: 2013-12-27 Inventor: Schrank, Franz   Carniello, Sara   Enichlmair, Hubert   Kraft, Jochen   Löffler, Bernhard   Holzhaider, Rainer   Assignee: ams AG   IPC: H01L21/768
5
US2021020511A1
METHOD OF FORMING A THROUGH-SUBSTRATE VIA AND A SEMICONDUCTOR DEVICE COMPRISING A THROUGH-SUBSTRATE VIA
Publication/Patent Number: US2021020511A1 Publication Date: 2021-01-21 Application Number: 16/980,197 Filing Date: 2019-04-03 Inventor: Kraft, Jochen   Parteder, Georg   Jessenig, Stefan   Schrank, Franz   Siegert, Jörg   Assignee: ams AG   IPC: H01L21/768 Abstract: A substrate is provided with a dielectric, a metal layer embedded in the dielectric, and a metallic layer arranged on the metal layer between the substrate and the metal layer. A via hole is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer is applied in the via hole and removed from above a contact area of the metal layer, and the metallic layer is completely removed from the contact area. A metallization is applied in the via hole on the contact area.
6
US2021072134A1
PARTICLE DENSITY SENSOR USING EVANESCENT WAVE OF WAVEGUIDE
Publication/Patent Number: US2021072134A1 Publication Date: 2021-03-11 Application Number: 16/772,416 Filing Date: 2018-12-13 Inventor: Kraft, Jochen   Röhrer, Georg   Castano, Sanchez Fernando Jesus   Pires, Singulani Anderson   Maierhofer, Paul   Assignee: ams AG   Technische Universität Graz   IPC: G01N15/06 Abstract: The particle sensor device comprises a substrate, a photodetector, a dielectric on or above the substrate, a source of electromagnetic radiation, and a through-substrate via in the substrate. The through-substrate via is exposed to the environment, in particular to ambient air. A waveguide is arranged in or above the dielectric so that the electromagnetic radiation emitted by the source of electromagnetic radiation is coupled into a portion of the waveguide. A further portion of the waveguide is opposite the photodetector, so that said portions of the waveguide are on different sides of the through-substrate via, and the waveguide traverses the through-substrate via.
7
US10684412B2
Semiconductor device with photonic and electronic functionality and method for manufacturing a semiconductor device
Publication/Patent Number: US10684412B2 Publication Date: 2020-06-16 Application Number: 15/757,645 Filing Date: 2016-08-25 Inventor: Kraft, Jochen   Siegert, Joerg   Assignee: ams AG   IPC: G02B6/12 Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
8
US2020284727A1
CHEMICAL SENSING DEVICE USING FLUORESCENT SENSING MATERIAL
Publication/Patent Number: US2020284727A1 Publication Date: 2020-09-10 Application Number: 16/766,179 Filing Date: 2018-11-28 Inventor: Sagmeister, Martin   Sidorov, Victor   Kraft, Jochen   Assignee: ams AG   IPC: G01N21/64 Abstract: The chemical sensing device comprises a substrate of semiconductor material, integrated circuit components and a photodetector formed in the substrate, a dielectric on the substrate, a wiring in the dielectric, and a source of electromagnetic radiation, a waveguide and a fluorescent sensor layer arranged in or above the dielectric. A portion of the waveguide is arranged to allow the electromagnetic radiation emitted by the source of electromagnetic radiation to be coupled into the waveguide. A further portion of the waveguide is arranged between the photodetector and the fluorescent sensor layer.
9
EP3460835B1
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
Publication/Patent Number: EP3460835B1 Publication Date: 2020-04-01 Application Number: 17192105.9 Filing Date: 2017-09-20 Inventor: Parteder, Georg   Kraft, Jochen   Coppeta, Raffaele   Assignee: ams AG   IPC: H01L21/768
10
US2020020611A1
Semiconductor Device
Publication/Patent Number: US2020020611A1 Publication Date: 2020-01-16 Application Number: 16/483,884 Filing Date: 2018-02-14 Inventor: Kraft, Jochen   Parteder, Georg   Singulani, Anderson   Coppeta, Raffaele   Schrank, Franz   Assignee: ams AG   IPC: H01L23/48 Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via. Furthermore, the etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction.
11
EP3628990A1
INTEGRATED OPTICAL TRANSDUCER AND METHOD FOR DETECTING DYNAMIC PRESSURE CHANGES
Publication/Patent Number: EP3628990A1 Publication Date: 2020-04-01 Application Number: 18196899.1 Filing Date: 2018-09-26 Inventor: Stojanovic, Goran   Steele, Colin   Hofrichter, Jens   Lazar, Catalin   Kraft, Jochen   Assignee: ams International AG   IPC: G01L9/00 Abstract: An integrated optical transducer (1) for detecting dynamic pressure changes comprises a micro-electro-mechanical system, MEMS, die (10) having a MEMS diaphragm (11) with a first side (12) exposed to the dynamic pressure changes and a second side (13), and an application-specific integrated circuit, ASIC, die (20) having an optical interferometer assembly. The interferometer assembly comprises a beam splitting element (21) for receiving a source beam (30) from a light source (23) and for splitting the source beam (30) into a probe beam (31) in a first beam path and a reference beam (32) in a second beam path, a beam combining element (22) for combining the probe beam (31) with the reference beam (32) to a superposition beam (33), and a detector (24) configured to generate an electronic interference signal depending on the superposition beam (33). The MEMS die (10) is arranged with respect to the ASIC die (20) such that a gap is formed between the second side (12) of the diaphragm and the ASIC die (20), with the gap defining a cavity (14) and having a gap height. The first beam path of the probe beam (31) comprises coupling into the cavity (14), reflection off of a deflection point or a deflection surface (16) of the diaphragm (11) and coupling out of the cavity (14).
12
US202020611A1
Semiconductor Device
Publication/Patent Number: US202020611A1 Publication Date: 2020-01-16 Application Number: 20/181,648 Filing Date: 2018-02-14 Inventor: Singulani, Anderson   Kraft, Jochen   Parteder, Georg   Coppeta, Raffaele   Schrank, Franz   Assignee: ams AG   IPC: H01L23/528 Abstract: A semiconductor device comprises a semiconductor body and an electrically conductive via which extends through at least a part of the semiconductor body, where the via has a lateral size which is given in a first lateral direction that is perpendicular to a vertical direction given by the main axis of extension of the via and where the via has a top side and a bottom side that faces away from the top side. The semiconductor device further comprises an electrically conductive etch-stop layer arranged at the bottom side of the via in a plane which is parallel to the first lateral direction, and at least one electrically conductive contact layer at the bottom side of the via in a plane which is parallel to the first lateral direction. The lateral extent in the first lateral direction of the etch-stop layer is larger than the lateral size of the via and the lateral extent in the first lateral direction of the contact layer is smaller than the lateral size of the via. Furthermore, the etch-stop layer is arranged between the electrically conductive via and the contact layer in the vertical direction.
13
EP3550600B1
METHOD OF FORMING A THROUGH-SUBSTRATE VIA AND SEMICONDUCTOR DEVICE COMPRISING THE THROUGH-SUBSTRATE VIA
Publication/Patent Number: EP3550600B1 Publication Date: 2020-08-05 Application Number: 18165692.7 Filing Date: 2018-04-04 Inventor: Kraft, Jochen   Parteder, Georg   Jessenig, Stefan   Schrank, Franz   Siegert, Jörg   Assignee: ams AG   IPC: H01L21/768
14
US201925505A1
SEMICONDUCTOR DEVICE WITH PHOTONIC AND ELECTRONIC FUNCTIONALITY AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
Publication/Patent Number: US201925505A1 Publication Date: 2019-01-24 Application Number: 20/161,575 Filing Date: 2016-08-25 Inventor: Siegert, Joerg   Kraft, Jochen   Assignee: ams AG   IPC: H01L23/522 Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
15
US2019025505A1
SEMICONDUCTOR DEVICE WITH PHOTONIC AND ELECTRONIC FUNCTIONALITY AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
Publication/Patent Number: US2019025505A1 Publication Date: 2019-01-24 Application Number: 15/757,645 Filing Date: 2016-08-25 Inventor: Kraft, Jochen   Siegert, Joerg   Assignee: ams AG   IPC: G02B6/12 Abstract: A semiconductor device has a semiconductor substrate and a first metallization stack arranged on the substrate. The substrate has and/or carries a plurality of electronic circuit elements. The first metallization stack has electrically insulating layers and at least one metallization layer. The semiconductor device further has a second metallization stack arranged on the first metallization stack and comprising further electrically insulating layers and an optical waveguide layer. The optical waveguide layer has at least one optical waveguide structure. Furthermore, one of the electrically insulating layers and one of the further electrically insulating layers are in direct contact with each other and form a pair of directly bonded layers.
16
EP3141941B1
SEMICONDUCTOR DEVICE WITH PHOTONIC AND ELECTRONIC FUNCTIONALITY AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
Publication/Patent Number: EP3141941B1 Publication Date: 2019-11-27 Application Number: 15184698.7 Filing Date: 2015-09-10 Inventor: Kraft, Jochen   Siegert, Jörg   Assignee: ams AG   IPC: G02B6/43
17
TW201916249A
Method for manufacturing a semiconductor device and semiconductor device
Publication/Patent Number: TW201916249A Publication Date: 2019-04-16 Application Number: 107130141 Filing Date: 2018-08-29 Inventor: Kraft, Jochen   Parteder, Georg   Coppeta, Raffaele   Assignee: AMS AG   IPC: H01L21/76 Abstract: A method for manufacturing a semiconductor device (10) is provided. The method comprises the steps of providing a semiconductor body (11), forming a trench (12) in the semiconductor body (11) in a vertical direction (z) which is perpendicular to the main plane of extension of the semiconductor body (11), and coating inner walls (13) of the trench (12) with an isolation layer (14). The method further comprises the steps of coating the isolation layer (14) at the inner walls (13) with a metallization layer (15), coating a top side (16) of the semiconductor body (11), at which the trench (12) is formed, at least partially with an electrically conductive contact layer (17), where the contact layer (17) is electrically connected with the metallization layer (15), coating the top side (16) of the semiconductor body (11) at least partially and the trench (12) with a capping layer (24), and forming a contact pad (18) at the top side (16) of the semiconductor body (11) by removing the contact layer (17) and the capping layer (24) at least partially. Furthermore, a semiconductor device (10) is provided.
18
EP2860560B1
Semiconductor device with optical and electrical vias
Publication/Patent Number: EP2860560B1 Publication Date: 2019-07-24 Application Number: 13188483.5 Filing Date: 2013-10-14 Inventor: Kraft, Jochen   Rohracher, Karl   Teva, Jordi   Assignee: ams AG   IPC: G02B6/42
19
US10340254B2
Method of producing an interposer-chip-arrangement for dense packaging of chips
Publication/Patent Number: US10340254B2 Publication Date: 2019-07-02 Application Number: 15/726,905 Filing Date: 2017-10-06 Inventor: Kraft, Jochen   Schrems, Martin   Schrank, Franz   Assignee: ams AG   IPC: H01L21/00 Abstract: The method of producing an interposer-chip-arrangement, comprises providing an interposer (1) with an integrated circuit (25), arranging a dielectric layer (2) with metal layers embedded in the dielectric layer above a main surface (10) of the interposer, connecting the integrated circuit with at least one of the metal layers, forming an interconnection (7) through the interposer, the interconnection contacting one of the metal layers, arranging a further dielectric layer (3) above a further main surface (11) of the interposer opposite the main surface and arranging a further metal layer in or on the further dielectric layer, the further metal layer being connected with the interconnection, arranging a chip provided with at least one contact pad at the main surface or at the further main surface, and electrically conductively connecting the contact pad with the interconnection.
20
EP3492909A1
CHEMICAL SENSING DEVICE USING FLUORESCENT SENSING MATERIAL
Publication/Patent Number: EP3492909A1 Publication Date: 2019-06-05 Application Number: 17204932.2 Filing Date: 2017-12-01 Inventor: Sagmeister, Martin   Sidorov, Victor   Kraft, Jochen   Assignee: ams AG   IPC: G01N21/77 Abstract: The chemical sensing device comprises a substrate (1) of semiconductor material, integrated circuit components (2) and a photodetector (3) formed in the substrate (1), a dielectric (4) on the substrate (1), a wiring (5) in the dielectric, and a source of electromagnetic radiation (6), a waveguide (9) and a fluorescent sensor layer (14) arranged in or above the dielectric. A portion of the waveguide is arranged to allow the electromagnetic radiation emitted by the source of electromagnetic radiation to be coupled into the waveguide. A further portion of the waveguide is arranged between the photodetector and the fluorescent sensor layer.
Total 9 pages