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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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1 US10540275B2
Memory controller, information processing system, and memory extension area management method
Publication/Patent Number: US10540275B2 Publication Date: 2020-01-21 Application Number: 15/523,763 Filing Date: 2015-10-08 Inventor: Okubo, Hideaki   Nakanishi, Kenichi   Fujinami, Yasushi   Assignee: Sony Corporation   IPC: G06F12/00 Abstract: To secure flexibility of the memory extension area which is secured on the memory of the host computer and used by the memory controller. [Solution] A controller memory stores data corresponding to an area allocated to a memory in a memory controller configured to control the memory. An access control unit allocates a partial area of the controller memory to a host memory in a host computer and uses the areas as a memory extension area. The extension area managing unit performs management so that a size of the memory extension area in the host memory is changeable. To secure flexibility of the memory extension area which is secured on the memory of the host computer and used by the memory controller. [Solution] A controller memory stores data corresponding to an area allocated to a memory in a memory controller configured to control the ...More ...Less
2 US2020117601A1
STORAGE CONTROLLER, STORAGE SYSTEM, STORAGE CONTROLLER CONTROLLING METHOD, AND PROGRAM
Publication/Patent Number: US2020117601A1 Publication Date: 2020-04-16 Application Number: 16/611,532 Filing Date: 2018-02-05 Inventor: Kaneda, Teruya   Nakanishi, Kenichi   Okubo, Hideaki   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: G06F12/0811 Abstract: An object is to suppress a process of evicting cached data so as to improve a throughput of an entire system. A storage controller includes an access request section and an operation management section. The access request section requests access to a first storage and to a second storage that is higher in response speed than the first storage, the second storage storing part of data stored in the first storage. The operation management section manages, based on a usage state of the second storage, whether or not to transfer from the first storage to the second storage data targeted for access but not stored in the second storage. An object is to suppress a process of evicting cached data so as to improve a throughput of an entire system. A storage controller includes an access request section and an operation management section. The access request section requests access to a first storage and to a ...More ...Less
3 US10545804B2
Memory controller, memory system, and memory controller control method
Publication/Patent Number: US10545804B2 Publication Date: 2020-01-28 Application Number: 15/507,413 Filing Date: 2015-07-22 Inventor: Shinbashi, Tatsuo   Tsutsui, Keiichi   Okubo, Hideaki   Sakai, Lui   Nakanishi, Kenichi   Fujinami, Yasushi   Assignee: Sony Corporation   IPC: G06F11/00 Abstract: [Object] To sufficiently reduce frequency of error occurrence in memory cells. [Solution] A reading unit reads read data from a memory cell, the read data including an information bit and reversal information for determining whether or not the information bit has been reversed. In addition, an error detection/correction unit detects the presence or absence of an error in the information bit and corrects the error. A data reversing unit reverses the information bit that has the error corrected and the reversal information. Furthermore, a writing unit writes the reversed information bit and the reversed reversal information in the memory cell. [Object] To sufficiently reduce frequency of error occurrence in memory cells. [Solution] A reading unit reads read data from a memory cell, the read data including an information bit and reversal information for determining whether or not the information bit has been reversed ...More ...Less
4 US2019095136A1
MEMORY CONTROL DEVICE, STORAGE DEVICE, AND INFORMATION PROCESSING SYSTEM
Publication/Patent Number: US2019095136A1 Publication Date: 2019-03-28 Application Number: 16/086,833 Filing Date: 2016-12-28 Inventor: Okubo, Hideaki   Nakanishi, Kenichi   Assignee: SONY CORPORATION   IPC: G06F3/06 Abstract: To perform both writing and reading at a high speed by utilizing a first memory and a second memory that has a lower writing speed and a higher reading speed than the first memory. A writing unit writes writing data related to a writing command in a first memory when the writing command is executed. A transfer unit transfers the writing data from the first memory to a second memory at a predetermined timing. A reading unit performs reading of reading data from the second memory with higher priority than from the first memory when a reading command is executed. To perform both writing and reading at a high speed by utilizing a first memory and a second memory that has a lower writing speed and a higher reading speed than the first memory. A writing unit writes writing data related to a writing command in a first memory when the writing ...More ...Less
5 EP1519275B1
INFORMATION STORAGE DEVICE, MEMORY ACCESS CONTROL METHOD, AND COMPUTER PROGRAM
Publication/Patent Number: EP1519275B1 Publication Date: 2019-03-27 Application Number: 03760898.1 Filing Date: 2003-06-19 Inventor: Okaue, Takumi   Nakanishi, Kenichi   Tashiro, Jun   Okubo, Hideaki   Assignee: Sony Corporation   IPC: G06F21/62
6 EP1517244B1
INFORMATION STORAGE DEVICE, MEMORY ACCESS CONTROL SYSTEM AND METHOD, AND COMPUTER PROGRAM
Publication/Patent Number: EP1517244B1 Publication Date: 2019-01-09 Application Number: 03760900.5 Filing Date: 2003-06-19 Inventor: Okubo, Hideaki   Tashiro, Jun   Nakanishi, Kenichi   Okaue, Takumi   Assignee: Sony Corporation   IPC: G06F12/14 Abstract: A device and method is provided for commonly and securely allowing, as access control on a memory card, a plurality of information processing apparatuses to lock/unlock the memory. On the basis of a lock command input from an information processing apparatus serving as a host, such as a PC, an information storage device, such as a memory card, determines whether (a) a standard lock key set serving as a key set prohibiting output or (b) an export lock key set serving as a key set permitting output is detected and stores corresponding key set information. Only when the export lock key set is detected, output is permitted provided that predetermined verification succeeds. A device and method is provided for commonly and securely allowing, as access control on a memory card, a plurality of information processing apparatuses to lock/unlock the memory. On the basis of a lock command input from an information processing apparatus serving as a host ...More ...Less
7 EP3211536B1
MEMORY CONTROLLER, MEMORY SYSTEM, AND MEMORY CONTROLLER CONTROL METHOD
Publication/Patent Number: EP3211536B1 Publication Date: 2019-09-04 Application Number: 15851846.4 Filing Date: 2015-07-22 Inventor: Shinbashi, Tatsuo   Tsutsui, Keiichi   Okubo, Hideaki   Sakai, Lui   Nakanishi, Kenichi   Fujinami, Yasushi   Assignee: Sony Corporation   IPC: G06F12/16