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1
US2021012174A1
NON-CONTACT COMMUNICATION MEDIUM, DRIVING METHOD THEREFOR, AND RECORDING MEDIUM CARTRIDGE
Publication/Patent Number: US2021012174A1 Publication Date: 2021-01-14 Application Number: 16/977,958 Filing Date: 2019-03-19 Inventor: Ono, Kazutoshi   Terashima, Toru   Fujita, Hiroaki   Nakano, Hiroaki   Maeda, Hideo   Shigyo, Nobuhiko   Assignee: Sony Semiconductor Solutions Corporation   IPC: G06K19/07 Abstract: A non-contact communication medium according to one disclosed embodiment includes a memory unit, a power generation unit, a power monitoring unit, and a capacitance control unit. The power generation unit includes a resonant circuit and a rectification circuit, and generates electric power to be supplied to the memory unit. The resonant circuit includes an antenna coil and resonant capacitance unit having a variable capacitance value, and the rectification circuit rectifies a resonant output of the resonant circuit. The power monitoring unit includes a current adjustment element, a reference voltage generation source, and an operational amplifier. The operational amplifier controls the current adjustment element such that an output voltage of the rectification circuit is equal to a reference voltage from the reference voltage generation source. The capacitance control unit is configured to control the resonant capacitance unit on the basis of an output of the operational amplifier.
2
EP3779794A1
NON-CONTACT COMMUNICATION MEDIUM, DRIVING METHOD THEREOF, AND RECORDING MEDIUM CARTRIDGE
Publication/Patent Number: EP3779794A1 Publication Date: 2021-02-17 Application Number: 19784778.3 Filing Date: 2019-03-19 Inventor: Ono, Kazutoshi   Terashima, Toru   Fujita, Hiroaki   Nakano, Hiroaki   Maeda, Hideo   Shigyo, Nobuhiko   Assignee: Sony Semiconductor Solutions Corporation   IPC: G06K19/07 Abstract: A non-contact communication medium according to an embodiment of the present technology includes: a memory unit; a power generation unit; a power monitoring unit; and a capacitance control unit. The memory unit stores predetermined management information. The power generation unit includes a resonant circuit and a rectification circuit, and generates electric power to be supplied to the memory unit, the resonant circuit including an antenna coil and resonant capacitance unit having a variable capacitance value, the rectification circuit rectifying a resonant output of the resonant circuit. The power monitoring unit includes a current adjustment element, a reference voltage generation source, and an operational amplifier, the current adjustment element being connected in parallel to the rectification circuit with respect to the resonant circuit and having a variable resistance value, the reference voltage generation source generating a reference voltage, the operational amplifier controlling the current adjustment element such that an output voltage of the rectification circuit is equal to the reference voltage. The capacitance control unit is configured to control the resonant capacitance unit on the basis of an output of the operational amplifier.
3
WO2019198438A1
NON-CONTACT COMMUNICATION MEDIUM, DRIVING METHOD THEREOF, AND RECORDING MEDIUM CARTRIDGE
Publication/Patent Number: WO2019198438A1 Publication Date: 2019-10-17 Application Number: 2019011397 Filing Date: 2019-03-19 Inventor: Fujita, Hiroaki   Terashima, Toru   Nakano, Hiroaki   Shigyo, Nobuhiko   Ono, Kazutoshi   Maeda, Hideo   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: G11B23/30 Abstract: A non-contact communication medium according to an embodiment of the present technology is provided with a memory unit, a power generating unit, a power monitoring unit, and a capacity control unit. The memory unit stores predetermined management information. The power generating unit has: a resonance circuit which has an antenna coil and a resonance capacity unit having a variable capacity value; and a rectification circuit which rectifies a resonance output of the resonance circuit, and generates power to be supplied to the memory unit. The power monitoring unit has: a current adjusting element which is connected in parallel to the rectification circuit with respect to the resonance circuit and has a variable resistance value; a reference voltage generating source which generates a reference voltage; and an operational amplifier which controls the current adjusting element such that the output voltage of the rectification circuit becomes equal to the reference voltage. The capacity control unit is configured to control the resonance capacity unit on the basis of the output of the operational amplifier.
4
US9430971B2
Electro-optical unit with pixel circuit of reduced area
Publication/Patent Number: US9430971B2 Publication Date: 2016-08-30 Application Number: 13/606,876 Filing Date: 2012-09-07 Inventor: Tsukamoto, Kouzi   Takeda, Kazuhiro   Urakawa, Takamitsu   Andou, Naoki   Ono, Kazutoshi   Assignee: SONY CORPORATION   IPC: G09G3/34 Abstract: An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.
5
JP5891678B2
ELECTRO-OPTICAL UNIT AND DISPLAY
Publication/Patent Number: JP5891678B2 Publication Date: 2016-03-23 Application Number: 2011207985 Filing Date: 2011-09-22 Inventor: Ando, Naoki   Takeda, Kazuhiro   Tsukamoto, Koji   Ono, Kazutoshi   Urakawa, Takamitsu   Assignee: SONY CORP   IPC: G02F1/133 Abstract: PROBLEM TO BE SOLVED: To provide an electro-optical unit and a display that allow an area of a pixel circuit to be reduced.SOLUTION: The electro-optical unit includes: a plurality of pixels provided correspondingly to portions where a plurality of pairs of data lines with two data lines assigned as a pair and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device
6
JP6046380B2
SWITCH
Publication/Patent Number: JP6046380B2 Publication Date: 2016-12-14 Application Number: 2012130116 Filing Date: 2012-06-07 Inventor: Suzuki, Toshio   Tagami, Hiroyasu   Tsukamoto, Koji   Ono, Kazutoshi   Shigyo, Nobuhiko   Yanase, Naoto   Assignee: SONY CORP   IPC: H01M10/44 Abstract: PROBLEM TO BE SOLVED: To provide a switch which can switch target rechargeable battery cells with a low-Vgs circuit configuration.SOLUTION: Disclosed herein is a switch for turning on/off the connection between a first terminal and a second terminal. The switch includes: a first transistor circuit comprising two transistors connected in series between the first terminal and the second terminal; and a second transistor circuit having a gate terminal connected to source terminals of the two transistors and a source terminal connected to gate terminals of the two transistors. The connection between the first terminal and the second terminal is turned on/off by switching high and low levels of the electric potential of the source terminal of the second transistor circuit.
7
US8981732B2
Switch, charge monitoring apparatus and rechargeable battery module
Publication/Patent Number: US8981732B2 Publication Date: 2015-03-17 Application Number: 13/592,436 Filing Date: 2012-08-23 Inventor: Ono, Kazutoshi   Yanase, Naoto   Tagami, Hiroyasu   Shigyo, Nobuhiko   Suzuki, Toshio   Tsukamoto, Kouzi   Assignee: Sony Corporation   IPC: H02J7/06 Abstract: Disclosed herein is a switch for turning on/off the connection between a first terminal and a second terminal. The switch includes a first transistor circuit configured from two transistors connected in series between the first terminal and the second terminal; and a second transistor circuit having a gate terminal connected to source terminals of the two transistors and a source terminal connected to gate terminals of the two transistors. The connection between the first terminal and the second terminal is changed over between on and off states by changing over a potential to the source terminal of the second transistor circuit between high and low levels.
8
JP2014142251A
RADIOACTIVE CONTAMINATED SOIL COVERING AGENT
Publication/Patent Number: JP2014142251A Publication Date: 2014-08-07 Application Number: 2013010559 Filing Date: 2013-01-23 Inventor: Kuramoto, Koichi   Ono, Kazutoshi   Yajima, Hirobumi   Assignee: NIPPON LIMONITE:KK   IPC: G21F1/10 Abstract: PROBLEM TO BE SOLVED: To provide a radioactive contaminated soil covering agent capable of shielding radioactive rays radiated from radioactive substances in radioactive contaminated soil to a ground surface up to a safe level.SOLUTION: The radioactive contaminated soil covering agent contains limonite burned at a specific temperature and formed like fine powder with a predetermined diameter or less and is characterized by forming a coat layer with a predetermined thickness by the limonite by spraying the covering agent to a ground surface of radioactive contaminated soil contaminated by radioactive substances. Further the radioactive contaminated soil covering agent also has a characteristic that the limonite and zeolite are mixed at a fixed rate.
9
US2014285256A1
TRANSCONDUCTANCE ADJUSTING CIRCUIT, FILTER CIRCUIT, AND ELECTRONIC APPARATUS
Publication/Patent Number: US2014285256A1 Publication Date: 2014-09-25 Application Number: 14/208,174 Filing Date: 2014-03-13 Inventor: Mitsuishi, Syou   Suzuki, Toshio   Shigyo, Nobuhiko   Ono, Kazutoshi   Hatanaka, Jyunichirou   Assignee: Sony Corporation   IPC: H03H11/04 Abstract: A transconductance adjusting circuit includes: a voltage generating section configured to generate a first differential voltage; a first transconductance amplifier configured to receive the first differential voltage through a first positive-phase voltage transmission line and a first reversed-phase voltage transmission line, and output a second differential voltage through a second positive-phase voltage transmission line and a second reversed-phase voltage transmission line; a first control section configured to receive the second differential voltage and supply a first control voltage to the first transconductance amplifier; a second control section configured to receive the second differential voltage and supply a second control voltage to the first transconductance amplifier; a first resistor section that makes a connection between the first positive-phase voltage transmission line and the second positive-phase voltage transmission line; and a second resistor section that makes a connection between the first reversed-phase voltage transmission line and the second reversed-phase voltage transmission line.
10
JP2014187486A
MUTUAL CONDUCTANCE ADJUSTMENT CIRCUIT
Publication/Patent Number: JP2014187486A Publication Date: 2014-10-02 Application Number: 2013060154 Filing Date: 2013-03-22 Inventor: Suzuki, Toshio   Ono, Kazutoshi   Shigyo, Nobuhiko   Hatanaka, Junichiro   Mitsuishi, Sho   Assignee: SONY CORP   IPC: H03F3/45 Abstract: PROBLEM TO BE SOLVED: To achieve higher adjustment accuracy of a Gm value than before by suppressing an error current generated at an output current of a Gm amplifier.SOLUTION: The mutual conductance adjustment circuit includes: a voltage generating section that generates a first differential voltage; a first mutual conductance amplifier that is input with the first differential voltage and outputs a second differential voltage; a first control section that is input with the second differential voltage and feeds back a first control voltage to the first mutual conductance amplifier; a second control section that is input with the second differential voltage and feeds back a second control voltage to the first mutual conductance amplifier; a first resistance section that connects a positive phase voltage transmission line of the first differential voltage with a positive phase voltage transmission line of the second differential voltage; and a second resistance section that connects a negative phase voltage transmission line of the first differential voltage with a negative phase voltage transmission line of the second differential voltage.
11
JP2013068836A
ELECTRO-OPTICAL UNIT AND DISPLAY
Publication/Patent Number: JP2013068836A Publication Date: 2013-04-18 Application Number: 2011207985 Filing Date: 2011-09-22 Inventor: Ando, Naoki   Takeda, Kazuhiro   Tsukamoto, Koji   Ono, Kazutoshi   Urakawa, Takamitsu   Assignee: SONY CORP   IPC: G02F1/133 Abstract: PROBLEM TO BE SOLVED: To provide an electro-optical unit and a display that allow an area of a pixel circuit to be reduced.SOLUTION: The electro-optical unit includes: a plurality of pixels provided correspondingly to portions where a plurality of pairs of data lines with two data lines assigned as a pair and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device
12
US2013076725A1
ELECTRO-OPTICAL UNIT AND DISPLAY
Publication/Patent Number: US2013076725A1 Publication Date: 2013-03-28 Application Number: 13/606,876 Filing Date: 2012-09-07 Inventor: Tsukamoto, Kouzi   Takeda, Kazuhiro   Urakawa, Takamitsu   Andou, Naoki   Ono, Kazutoshi   Assignee: SONY CORPORATION   IPC: G09G3/36 Abstract: An electro-optical unit includes pixels provided correspondingly to portions where a plurality of pairs of data lines and a plurality of gate lines intersect with each other. Each of the pixels has an electro-optical device and a pixel circuit. The pixel circuit has a holding circuit connected with one of the plurality of pairs of data lines and one of the plurality of gate lines, and a selection circuit connected with an output of the holding circuit and the electro-optical device. The holding circuit is capable of sampling and holding a first image signal to be applied to one of the pair of the data lines, while sampling and holding a second image signal to be applied to the other of the pair of the data lines. The selection circuit is capable of outputting the first image signal and the second image signal to the electro-optical device selectively.
13
US2013049760A1
SWITCH, CHARGE MONITORING APPARATUS AND RECHARGEABLE BATTERY MODULE
Publication/Patent Number: US2013049760A1 Publication Date: 2013-02-28 Application Number: 13/592,436 Filing Date: 2012-08-23 Inventor: Ono, Kazutoshi   Yanase, Naoto   Tagami, Hiroyasu   Shigyo, Nobuhiko   Suzuki, Toshio   Tsukamoto, Kouzi   Assignee: Sony Corporation   IPC: H03K17/687 Abstract: Disclosed herein is a switch for turning on/off the connection between a first terminal and a second terminal. The switch includes a first transistor circuit configured from two transistors connected in series between the first terminal and the second terminal; and a second transistor circuit having a gate terminal connected to source terminals of the two transistors and a source terminal connected to gate terminals of the two transistors. The connection between the first terminal and the second terminal is changed over between on and off states by changing over a potential to the source terminal of the second transistor circuit between high and low levels.
14
JP2013066369A
SWITCH
Publication/Patent Number: JP2013066369A Publication Date: 2013-04-11 Application Number: 2012130116 Filing Date: 2012-06-07 Inventor: Suzuki, Toshio   Tagami, Hiroyasu   Tsukamoto, Koji   Ono, Kazutoshi   Shigyo, Nobuhiko   Yanase, Naoto   Assignee: SONY CORP   IPC: H01M10/44 Abstract: PROBLEM TO BE SOLVED: To provide a switch which can switch target rechargeable battery cells with a low-Vgs circuit configuration.SOLUTION: Disclosed herein is a switch for turning on/off the connection between a first terminal and a second terminal. The switch includes: a first transistor circuit comprising two transistors connected in series between the first terminal and the second terminal; and a second transistor circuit having a gate terminal connected to source terminals of the two transistors and a source terminal connected to gate terminals of the two transistors. The connection between the first terminal and the second terminal is turned on/off by switching high and low levels of the electric potential of the source terminal of the second transistor circuit.
15
JP4883934B2
PRODUCTION SHIPPING PLAN PREPARATION SYSTEM AND METHOD FOR STEEL PRODUCTS
Publication/Patent Number: JP4883934B2 Publication Date: 2012-02-22 Application Number: 2005132507 Filing Date: 2005-04-28 Inventor: Murakami, Atsushi   Fukuda, Masahiro   Abe, Masaharu   Inaoka, Kazuma   Inaba, Mitsunobu   Ono, Kazutoshi   Taguchi, Naoyuki   Totoki, Kazuhiro   Ienaga, Junya   Assignee: NIPPON STEEL CORP   NS SOLUTIONS CORP   IPC: G05B19/418 Abstract: PROBLEM TO BE SOLVED: To provide the production shipping plan preparation system and method of steel products for preparing a precise plan from production allocation to shipping
16
JP2011131836A
AXLE LOAD MOVEMENT DEVICE FOR VEHICLE
Publication/Patent Number: JP2011131836A Publication Date: 2011-07-07 Application Number: 2009295177 Filing Date: 2009-12-25 Inventor: Ono, Kazutoshi   Assignee: MITSUBISHI FUSO TRUCK & BUS CORP   IPC: B60G17/015 Abstract: PROBLEM TO BE SOLVED: To certainly prevent the brake lock of a driven wheel at axle load movement from a driven shaft to a drive shaft in an axle load movement device for a vehicle. SOLUTION: The axle load movement device is provided at the vehicle of the two-rear axle comprising the drive shaft and the driven shaft and moves the axle load applied to the driven shaft to the drive shaft. The axle load movement device includes a brake cut means 41 for cutting a brake force transmitted to the driven wheel pivotally supported by the driven shaft when the axle load is moved from the driven shaft to the drive shaft. COPYRIGHT: (C)2011
17
JP4260266B2
PRODUCTION QUALITY CONTROL SYSTEM AND PRODUCTION QUALITY CONTROL METHOD
Publication/Patent Number: JP4260266B2 Publication Date: 2009-04-30 Application Number: 3743799 Filing Date: 1999-02-16 Inventor: Horishita, Masatsugu   Ono, Kazutoshi   Momii, Tomomitsu   Assignee: NIPPON STEEL CORP   SHINNITTETSU JOHO TSUSHIN SYST KK   IPC: B23Q41/08 Abstract: PROBLEM TO BE SOLVED: To effectively
18
JP2007197292A
HIGH-STRENGTH POLYMER CEMENT COMPOSITION
Publication/Patent Number: JP2007197292A Publication Date: 2007-08-09 Application Number: 2006041585 Filing Date: 2006-01-24 Inventor: Tamanoi, Hideo   Ono, Kazutoshi   Assignee: KAWAMURA SHOGO   ONO KAZUTOSHI   MORISHITA KAZUYOSHI   DAIHO:KK   NOJIRI YOSHITO   IPC: C02F1/46 Abstract: PROBLEM TO BE SOLVED: To provide a high-strength polymer cement composition obtained by reusing a waste material such as various kinds of glass
19
JP3916754B2
AUTOMATIC FIRE ALARMING SYSTEM
Publication/Patent Number: JP3916754B2 Publication Date: 2007-05-23 Application Number: 7159298 Filing Date: 1998-03-20 Inventor: Ikeda, Kenji   Nakamura, Shinji   Yoshida, Kazuhiro   Kuwano, Takeshi   Koyama, Kiyoaki   Minegishi, Yoshiaki   Ono, Kazutoshi   Assignee: MATSUSHITA ELECTRIC IND CO LTD   HOCHIKI CORP   IPC: G08B17/00 Abstract: PROBLEM TO BE SOLVED: To generate an alarm and to easily specify the floor of a broken-out fire by emitting alarming sound by speakers at all the dwellings within multiple dwelling houses. SOLUTION: Concerning an automatic fire alarming system
20
JP2006039597A
DATA LINKAGE SYSTEM
Publication/Patent Number: JP2006039597A Publication Date: 2006-02-09 Application Number: 2001336754 Filing Date: 2001-11-01 Inventor: Ono, Kazutoshi   Assignee: APPRESSO:KK   IPC: G06F9/44 Abstract: PROBLEM TO BE SOLVED: To provide a data linkage system that does not require development of linkage software between data sources at user level. SOLUTION: The data linkage system comprises an adapter having an adapter interface ai for accepting commands defined by abstract concepts of 'put data' and 'get data' and outputting an object stereotyped as a 'result'
Total 5 pages