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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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1
US2021043672A1
IMAGING UNIT, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
Publication/Patent Number: US2021043672A1 Publication Date: 2021-02-11 Application Number: 17/044,460 Filing Date: 2019-03-05 Inventor: Nishio, Kenya   Saito, Suguru   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: Provided is an imaging unit more efficiently manufacturable with high dimensional precision. The imaging unit includes: a sensor board including an imaging device, in which the imaging device has a plurality of pixels and allows generation of a pixel signal by receiving outside light in each of the plurality of pixels; a bonding layer including an inorganic insulating material; and a circuit board including a circuit chip and an organic insulating layer, in which a circuit chip has a signal processing circuit that performs signal processing for the pixel signal and is bonded to the sensor board through the bonding layer, and the organic insulating layer covers a vicinity of the circuit chip.
2
EP3329313B1
LENS ATTACHED SUBSTRATE, LAYERED LENS STRUCTURE, CAMERA MODULE, MANUFACTURING APPARATUS, AND MANUFACTURING METHOD
Publication/Patent Number: EP3329313B1 Publication Date: 2021-02-17 Application Number: 16751016.3 Filing Date: 2016-07-15 Inventor: Moriya, Yusuke   Iwasaki, Masanori   Oinoue, Takashi   Hagimoto, Yoshiya   Matsugai, Hiroyasu   Itou, Hiroyuki   Saito, Suguru   Ohshima, Keiji   Fujii, Nobutoshi   Tazawa, Hiroshi   Shiraiwa, Toshiaki   Ishida, Minoru   Assignee: Sony Semiconductor Solutions Corporation   IPC: G02B13/00
3
EP3329315B1
STACKED LENS STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3329315B1 Publication Date: 2021-03-31 Application Number: 16751020.5 Filing Date: 2016-07-19 Inventor: Yamamoto, Atsushi   Takeuchi, Koichi   Kurobe, Toshihiro   Matsugai, Hiroyasu   Itou, Hiroyuki   Saito, Suguru   Ohshima, Keiji   Fujii, Nobutoshi   Tazawa, Hiroshi   Shiraiwa, Toshiaki   Ishida, Minoru   Assignee: Sony Semiconductor Solutions Corporation   IPC: G02B13/00
4
US2020127039A1
LIGHT-RECEIVING DEVICE, METHOD OF MANUFACTURING LIGHT RECEIVING DEVICE, IMAGING DEVICE, AND ELECTRONIC APPARATUS
Publication/Patent Number: US2020127039A1 Publication Date: 2020-04-23 Application Number: 16/477,969 Filing Date: 2017-12-19 Inventor: Saito, Suguru   Fujii, Nobutoshi   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: There is provided a light-receiving device including: a plurality of photoelectric conversion layers including a first photoelectric conversion layer and a second photoelectric conversion layer disposed in respective regions that are different in a planar view; an insulating film that separates the plurality of photoelectric conversion layers from one another; a first inorganic semiconductor material included in the first photoelectric conversion layer; and a second inorganic semiconductor material included in the second photoelectric conversion layer, and different from the first inorganic semiconductor material.
5
US2020350198A1
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
Publication/Patent Number: US2020350198A1 Publication Date: 2020-11-05 Application Number: 16/959,723 Filing Date: 2018-12-28 Inventor: Saito, Suguru   Fujii, Nobutoshi   Haneda, Masaki   Nagahata, Kazunori   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L21/768 Abstract: The present technology relates to a semiconductor device in which an air gap structure can be formed in any desired region regardless of the layout of metallic wiring lines, a method for manufacturing the semiconductor device, and an electronic apparatus. A first wiring layer and a second wiring layer including a metallic film are stacked via a diffusion preventing film that prevents diffusion of the metallic film. The diffusion preventing film is formed by burying a second film in a large number of holes formed in a first film. At least the first wiring layer includes the metallic film, an air gap, and a protective film formed with the second film on the inner peripheral surface of the air gap, and the opening width of the air gap is equal to the opening width of the holes formed in the first film or is greater than the opening width of the holes. For example, the present technology can be applied to a semiconductor device in which wiring layers are stacked, and the like.
6
US2020321386A1
LIGHT RECEIVING ELEMENT AND ELECTRONIC APPARATUS
Publication/Patent Number: US2020321386A1 Publication Date: 2020-10-08 Application Number: 16/956,128 Filing Date: 2018-12-12 Inventor: Manda, Shuji   Matsumoto, Ryosuke   Saito, Suguru   Ikehara, Shigehiro   Yamaguchi, Tetsuji   Maruyama, Shunsuke   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: A first light receiving element according to an embodiment of the present disclosure includes a plurality of pixels, a photoelectric converter that is provided as a layer common to the plurality of pixels, and contains a compound semiconductor material, and a first electrode layer that is provided between the plurality of pixels on light incident surface side of the photoelectric converter, and has a light-shielding property.
7
US202035739A1
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
Publication/Patent Number: US202035739A1 Publication Date: 2020-01-30 Application Number: 20/181,660 Filing Date: 2018-04-16 Inventor: Shimizu, Hideo   Fujii, Nobutoshi   Maruyama, Shunsuke   Zaizen, Yoshifumi   Matsumoto, Ryosuke   Manda, Shuji   Saito, Suguru   Assignee: Sony Semiconductor Solutions Corporation   IPC: H01L31/0304 Abstract: A semiconductor device including a device substrate and a readout circuit substrate. The device substrate includes a device region and a peripheral region. In the device region, a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked. The peripheral region is disposed outside the device region. The readout circuit substrate faces the first semiconductor layer with the wiring layer in between, and is electrically coupled to the first semiconductor layer through the wiring layer. The peripheral region of the device substrate has a junction surface with the readout circuit substrate.
8
US2020035739A1
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS
Publication/Patent Number: US2020035739A1 Publication Date: 2020-01-30 Application Number: 16/604,062 Filing Date: 2018-04-16 Inventor: Saito, Suguru   Fujii, Nobutoshi   Matsumoto, Ryosuke   Zaizen, Yoshifumi   Manda, Shuji   Maruyama, Shunsuke   Shimizu, Hideo   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: A semiconductor device including a device substrate and a readout circuit substrate. The device substrate includes a device region and a peripheral region. In the device region, a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked. The peripheral region is disposed outside the device region. The readout circuit substrate faces the first semiconductor layer with the wiring layer in between, and is electrically coupled to the first semiconductor layer through the wiring layer. The peripheral region of the device substrate has a junction surface with the readout circuit substrate.
9
EP3734659A1
LIGHT RECEIVING ELEMENT AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3734659A1 Publication Date: 2020-11-04 Application Number: 18895966.2 Filing Date: 2018-12-12 Inventor: Manda, Shuji   Matsumoto, Ryosuke   Saito, Suguru   Ikehara, Shigehiro   Yamaguchi, Tetsuji   Maruyama, Shunsuke   Assignee: Sony Semiconductor Solutions Corporation   IPC: H01L27/146 Abstract: A first light receiving element according to an embodiment of the present disclosure includes a plurality of pixels, a photoelectric converter that is provided as a layer common to the plurality of pixels, and contains a compound semiconductor material, and a first electrode layer that is provided between the plurality of pixels on light incident surface side of the photoelectric converter, and has a light-shielding property.
10
EP3614434A1
SEMICONDUCTOR ELEMENT, METHOD FOR PRODUCING SAME, AND ELECTRONIC DEVICE
Publication/Patent Number: EP3614434A1 Publication Date: 2020-02-26 Application Number: 18787243.7 Filing Date: 2018-04-16 Inventor: Saito, Suguru   Fujii, Nobutoshi   Matsumoto, Ryosuke   Zaizen, Yoshifumi   Manda, Shuji   Maruyama, Shunsuke   Shimizu, Hideo   Assignee: Sony Semiconductor Solutions Corporation   IPC: H01L27/146 Abstract: A semiconductor device including a device substrate and a readout circuit substrate. The device substrate includes a device region and a peripheral region. In the device region, a wiring layer and a first semiconductor layer including a compound semiconductor material are stacked. The peripheral region is disposed outside the device region. The readout circuit substrate faces the first semiconductor layer with the wiring layer in between, and is electrically coupled to the first semiconductor layer through the wiring layer. The peripheral region of the device substrate has a junction surface with the readout circuit substrate.
11
US10690814B2
Lens substrate, semiconductor device, and electronic apparatus
Publication/Patent Number: US10690814B2 Publication Date: 2020-06-23 Application Number: 15/747,302 Filing Date: 2016-07-19 Inventor: Shiraiwa, Toshiaki   Okamoto, Masaki   Matsugai, Hiroyasu   Itou, Hiroyuki   Saito, Suguru   Ohshima, Keiji   Fujii, Nobutoshi   Tazawa, Hiroshi   Ishida, Minoru   Assignee: Sony Semiconductor Solutions Corporation   IPC: G02B3/00 Abstract: Influence of chipping in case of dicing a plurality of stacked substrates is reduced. Provided is a semiconductor device where a substrate, in which a groove surrounding a pattern configured with a predetermined circuit or part is formed, is stacked. The present technology can be applied to, for example, a stacked lens structure where through-holes are formed in each substrate and lenses are disposed in inner sides of the through-holes, a camera module where a stacked lens structure and a light-receiving device are incorporated, a solid-state imaging device where a pixel substrate and a control substrate are stacked, and the like.