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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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Inventor Inventor Assignee Assignee IPC IPC
1
EP3540776A3
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3540776A3 Publication Date: 2020-01-08 Application Number: 19173175.1 Filing Date: 2014-12-12 Inventor: Komai, Naoki   Sasaki, Naoto   Ogawa, Naoki   Oinoue, Takashi   Iwamoto, Hayato   Ooka, Yutaka   Nagata, Masaya   Assignee: Sony Corporation   IPC: H01L27/146 Abstract: A semiconductor device (1) includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit (23) processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween.
2
US2019214418A1
SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE
Publication/Patent Number: US2019214418A1 Publication Date: 2019-07-11 Application Number: 16/328,717 Filing Date: 2017-08-04 Inventor: Sasaki, Naoto   Ooka, Yutaka   Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION   IPC: H01L27/146 Abstract: The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.
3
EP3084831B1
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3084831B1 Publication Date: 2019-05-08 Application Number: 14821306.9 Filing Date: 2014-12-12 Inventor: Komai, Naoki   Sasaki, Naoto   Ogawa, Naoki   Oinoue, Takashi   Iwamoto, Hayato   Ooka, Yutaka   Nagata, Masaya   Assignee: Sony Corporation   IPC: H01L27/146
4
EP3540776A2
SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS
Publication/Patent Number: EP3540776A2 Publication Date: 2019-09-18 Application Number: 19173175.1 Filing Date: 2014-12-12 Inventor: Komai, Naoki   Sasaki, Naoto   Ogawa, Naoki   Oinoue, Takashi   Iwamoto, Hayato   Ooka, Yutaka   Nagata, Masaya   Assignee: Sony Corporation   IPC: H01L27/146 Abstract: A semiconductor device (1) includes a first semiconductor substrate (12) in which a pixel region (21) where pixel portions performing photoelectric conversion are two-dimensionally arranged is formed and a second semiconductor substrate (11) in which a logic circuit (23) processing a pixel signal output from the pixel portion is formed, the first and second semiconductor substrates being laminated. A protective substrate (18) protecting an on-chip lens (16) is disposed on the on-chip lens in the pixel region of the first semiconductor substrate with a sealing resin (17) interposed therebetween.