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41 | US10468541B2 |
Semiconductor device with through-substrate via and corresponding method of manufacture
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Publication/Patent Number: US10468541B2 | Publication Date: 2019-11-05 | Application Number: 15/107,901 | Filing Date: 2014-12-12 | Inventor： Schrank, Franz Carniello, Sara Enichlmair, Hubert Kraft, Jochen Loeffler, Bernhard Holzhaider, Rainer | Assignee: ams AG | IPC: H01L31/0224 | Abstract: A dielectric layer (2) is arranged on the main surface (10) of a semiconductor substrate (1), and a passivation layer (6) is arranged on the dielectric layer. A metal layer (3) is embedded in the dielectric layer above an opening (12) in the substrate, and a metallization (14) is arranged in the opening. The metallization contacts the metal layer and forms a through-substrate via to a rear surface (11) of the substrate. A layer or layer sequence (7, 8, 9) comprising at least one further layer is arranged on the passivation layer above the opening. In this way the bottom of the through-substrate via is stabilized. A plug (17) may additionally be arranged in the opening without filling the opening. | |||
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42 | US2019265119A1 |
PRESSURE SENSOR DEVICE AND METHOD FOR FORMING A PRESSURE SENSOR DEVICE
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Publication/Patent Number: US2019265119A1 | Publication Date: 2019-08-29 | Application Number: 16/333,671 | Filing Date: 2017-10-02 | Inventor： Siegert, Joerg Besling, Willem Frederik Adrianus Tak, Coenraad Cornelis Schrems, Martin Schrank, Franz | Assignee: ams International AG | IPC: G01L19/14 | Abstract: A pressure sensor device comprises a substrate body, a pressure sensor comprising a membrane, and a cap body comprising at least one opening. The pressure sensor is arranged between the substrate body and the cap body in a vertical direction which is perpendicular to the main plane of extension of the substrate body, and the mass of the substrate body equals approximately the mass of the cap body. Furthermore, a method for forming a pressure sensor device is provided. | |||
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43 | EP3550600A1 |
METHOD OF FORMING A THROUGH-SUBSTRATE VIA AND A SEMICONDUCTOR DEVICE COMPRISING A THROUGH-SUBSTRATE VIA
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Publication/Patent Number: EP3550600A1 | Publication Date: 2019-10-09 | Application Number: 18165692.7 | Filing Date: 2018-04-04 | Inventor： Kraft, Jochen Parteder, Georg Jessenig, Stefan Schrank, Franz Siegert, Jörg | Assignee: ams AG | IPC: H01L21/768 | Abstract: A substrate (1) is provided with a dielectric (2), a metal layer (3) embedded in the dielectric, and a metallic layer (4) arranged on the metal layer between the substrate and the metal layer. A via hole (9) is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer (11) is applied in the via hole and removed from above a contact area (10) of the metal layer, and the metallic layer is completely removed from the contact area (10). A metallization (12) is applied in the via hole on the contact area. | |||
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44 | EP3471146A1 |
METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR
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Publication/Patent Number: EP3471146A1 | Publication Date: 2019-04-17 | Application Number: 17196609.6 | Filing Date: 2017-10-16 | Inventor： Toschkoff, Gregor Bodner, Thomas Schrank, Franz Labodi, Miklos Siegert, Jörg Schrems, Martin | Assignee: ams AG | IPC: H01L27/146 | Abstract: A method for manufacturing an optical sensor (10) is provided. The method comprises providing an optical sensor arrangement (11) which comprises at least two optical sensor elements (12) on a carrier (13), where the optical sensor arrangement (11) comprises a light entrance surface (14) at the side of the optical sensor elements (12) facing away from the carrier (13). The method further comprises forming a trench (15) between two optical sensor elements (12) in a vertical direction (z) which is perpendicular to the main plane of extension of the carrier (13), where the trench (15) extends from the light entrance surface (14) of the sensor arrangement (11) at least to the carrier (13). Moreover, the method comprises coating the trench (15) with an opaque material (16), forming electrical contacts (17) for the at least two optical sensor elements (12) on a back side (18) of the carrier (13) facing away from the optical sensor elements (12), and forming at least one optical sensor (10) by dicing the optical sensor arrangement (11) along the trench (15). Each optical sensor (10) comprises an optical sensor element (12), and the light entrance surface (14) is free of electrical contacts (17) and at least partially free of the opaque material (16) above the optical sensor elements (12). Furthermore, an optical sensor (10) is provided. | |||
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45 | WO2019076806A1 |
METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR
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Publication/Patent Number: WO2019076806A1 | Publication Date: 2019-04-25 | Application Number: 2018078064 | Filing Date: 2018-10-15 | Inventor： Schrank, Franz Schrems, Martin Siegert, JÖrg Bodner, Thomas Toschkoff, Gregor Labodi, Miklos | Assignee: AMS AG | IPC: H01L27/146 | Abstract: A method for manufacturing an optical sensor (10) is provided. The method comprises providing an optical sensor arrangement (11) which comprises at least two optical sensor elements (12) on a carrier (13), where the optical sensor arrangement (11) comprises a light entrance surface (14) at the side of the optical sensor elements (12) facing away from the carrier (13). The method further comprises forming a trench (15) between two optical sensor elements (12) in a vertical direction (z) which is perpendicular to the main plane of extension of the carrier (13), where the trench (15) extends from the light entrance surface (14) of the sensor arrangement (11) at least to the carrier (13). Moreover, the method comprises coating the trench (15) with an opaque material (16), forming electrical contacts (17) for the at least two optical sensor elements (12) on a back side(18)of the carrier (13) facing away from the optical sensor elements (12), and forming at least one optical sensor (10) by dicing the optical sensor arrangement (11) along the trench (15). Each optical sensor (10) comprises an optical sensor element (12), and the light entrance surface (14) is free of electrical contacts (17) and at least partially free of the opaque material (16) above the optical sensor elements (12). Furthermore, an optical sensor (10) is provided. | |||
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46 | EP2648214B1 |
Methods of producing a semiconductor device with a through-substrate via
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Publication/Patent Number: EP2648214B1 | Publication Date: 2019-06-12 | Application Number: 12163391.1 | Filing Date: 2012-04-05 | Inventor： Löffler, Bernhard Rohracher, Karl Schrank, Franz Siegert, Jörg Kraft, Jochen | Assignee: ams AG | IPC: H01L21/768 | ||||
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47 | WO2019193067A1 |
METHOD OF FORMING A THROUGH-SUBSTRATE VIA AND A SEMICONDUCTOR DEVICE COMPRISING A THROUGH-SUBSTRATE VIA
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Publication/Patent Number: WO2019193067A1 | Publication Date: 2019-10-10 | Application Number: 2019058430 | Filing Date: 2019-04-03 | Inventor： Schrank, Franz Kraft, Jochen Jessenig, Stefan Siegert, JÖrg Parteder, Georg | Assignee: AMS AG | IPC: H01L23/48 | Abstract: A substrate (1) is provided with a dielectric (2), a metal layer (3) embedded in the dielectric, and a metallic layer (4) arranged on the metal layer between the substrate and the metal layer. A via hole (9) is formed in the substrate and in a region of the dielectric that is between the substrate and the metal layer. An insulation layer (11) is applied in the via hole and removed from above a contact area (10) of the metal layer, and the metallic layer is completely removed from the contact area (10). A metallization (12) is applied in the via hole on the contact area. | |||
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48 | EP2899760B1 |
Semiconductor device for optical applications and method of producing such a semiconductor device
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Publication/Patent Number: EP2899760B1 | Publication Date: 2018-08-29 | Application Number: 14152688.9 | Filing Date: 2014-01-27 | Inventor： Enichlmair, Hubert Schrank, Franz | Assignee: ams AG | IPC: H01L31/0203 | Abstract: A sensor (2) is arranged at a main surface (10) of a semiconductor substrate (1), and a filter (3) is arranged above the sensor. A through-substrate via (4) penetrates the substrate outside the region of the sensor. A semiconductor body is applied above the main surface and then partially removed at least in an area above the sensor. A portion of the semiconductor body remains above the through-substrate via as a frame layer (5). The filter is on a level with the frame layer. | |||
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49 | DE102018109015A1 |
LED Modul mit Reflektor und integrierten Farbkonversionsmitteln
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Publication/Patent Number: DE102018109015A1 | Publication Date: 2018-12-20 | Application Number: 102018109015 | Filing Date: 2018-04-17 | Inventor： Schrank, Franz Gruendling, Vladimir | Assignee: TRIDONIC JENNERSDORF GMBH | IPC: H01L33/60 | Abstract: Die Erfindung betrifft ein LED Modul (10) für den Einsatz in einem Strahler oder einer Deckenleuchte aufweisend einen Träger (1), wenigstens einen auf dem Träger (1) angeordneten LED Chip (2), ein auf dem Träger (1) und über dem LED Chip (2) angeordnetes optischen System aufweisend einen Reflektor (3) mit wenigstens einer den LED Chip (2) umgebenden ersten Reflektorkammer (3a) und einer darüber liegenden zweiten Reflektorkammer (3b), wobei die erste Reflektorkammer (3a) mit einem Farbkonversionsmittel (4) gefüllt ist, welche ein vom LED Chip (2) emittiertes Licht wenigstens teilweise in Licht einer anderen Wellenlänge konvertiert. | |||
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50 | US10084004B2 |
Semiconductor device for optical applications and method of producing such a semiconductor device
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Publication/Patent Number: US10084004B2 | Publication Date: 2018-09-25 | Application Number: 15/114,387 | Filing Date: 2015-01-14 | Inventor： Enichlmair, Hubert Schrank, Franz | Assignee: AMS AG | IPC: H01L31/0232 | Abstract: A sensor (2) is arranged at a main surface (10) of a semiconductor substrate (1), and a filter (3) is arranged above the sensor. A through-substrate via (4) penetrates the substrate outside the region of the sensor. A semiconductor body is applied above the main surface and then partially removed at least in an area above the sensor. A portion of the semiconductor body remains above the through-substrate via as a frame layer (5). The filter is on a level with the frame layer. | |||
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51 | EP2584598B1 |
Method of producing a semiconductor device comprising a through-substrate via and a capping layer and corresponding semiconductor device
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Publication/Patent Number: EP2584598B1 | Publication Date: 2018-12-05 | Application Number: 11185999.7 | Filing Date: 2011-10-20 | Inventor： Schrank, Franz Cassidy, Cathal | Assignee: ams AG | IPC: H01L21/768 | Abstract: The method of producing a semiconductor device comprises the steps of providing a semiconductor substrate (1) with an electrically conductive structure (11), forming a hole (4) through the substrate in a direction normal to its main surface (10), and forming a through-substrate via (5) in the hole by introducing an electrically conductive material without filling the hole. A capping layer (6) is applied above the main surface in such a way that the capping layer closes the remaining inner volume (14) of the through-substrate via without filling the hole or at least partially covers an annular cavity surrounding the through-substrate via. The capping layer is structured, so that the electrically conductive structure is not completely covered by the capping layer. | |||
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52 | EP3211303B1 |
LED-MODULE
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Publication/Patent Number: EP3211303B1 | Publication Date: 2018-07-25 | Application Number: 17154292.1 | Filing Date: 2017-02-02 | Inventor： Fink, Bernhard Schrank, Franz Pfeiler-deutschmann, Martin | Assignee: Tridonic Jennersdorf GmbH | IPC: F21V29/502 | ||||
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53 | EP3282480A1 |
METHOD OF PRODUCING AN OPTICAL SENSOR AT WAFER-LEVEL AND OPTICAL SENSOR
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Publication/Patent Number: EP3282480A1 | Publication Date: 2018-02-14 | Application Number: 16183205.0 | Filing Date: 2016-08-08 | Inventor： Toschkoff, Gregor Bodner, Thomas Schrank, Franz | Assignee: ams AG | IPC: H01L27/146 | Abstract: A method is proposed to produce an optical sensor at wafer-level, the methods comprises the following steps. A wafer (10) is provided and has a main top surface (11) and a main back surface (12). At or near the top surface (11) of the wafer at least one integrated circuit (20) is arranged having a light sensitive component (21). A first mold tool (1) is placed over the at least one integrated circuit such that at least one channel (37) remains between the first mold tool (1) and the top surface (11) to enter a first mold material. A first mold structure (30) is formed by wafer-level molding the first mold material via the at least one channel (37). The first mold material creates at least one runner structure (35). A second mold tool (2) is placed over the first mold structure (30) and a second mold structure (40) is formed by wafer-level molding a second mold material by means of the second mold tool (2). A light path blocking structure (50) is arranged on the top surface (11) to block light from entering via the at least one runner structure (35). | |||
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54 | US201896969A1 |
METHOD OF PRODUCING AN INTERPOSER-CHIP-ARRANGEMENT FOR DENSE PACKAGING OF CHIPS
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Publication/Patent Number: US201896969A1 | Publication Date: 2018-04-05 | Application Number: 20/171,572 | Filing Date: 2017-10-06 | Inventor： Schrems, Martin Schrank, Franz Parteder, Georg | Assignee: ams AG | IPC: H01L25/065 | Abstract: The method of producing an interposer-chip-arrangement, comprises providing an interposer (1) with an integrated circuit (25), arranging a dielectric layer (2) with metal layers embedded in the dielectric layer above a main surface (10) of the interposer, connecting the integrated circuit with at least one of the metal layers, forming an interconnection (7) through the interposer, the interconnection contacting one of the metal layers, arranging a further dielectric layer (3) above a further main surface (11) of the interposer opposite the main surface and arranging a further metal layer in or on the further dielectric layer, the further metal layer being connected with the interconnection, arranging a chip provided with at least one contact pad at the main surface or at the further main surface, and electrically conductively connecting the contact pad with the interconnection. | |||
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55 | US2018096969A1 |
METHOD OF PRODUCING AN INTERPOSER-CHIP-ARRANGEMENT FOR DENSE PACKAGING OF CHIPS
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Publication/Patent Number: US2018096969A1 | Publication Date: 2018-04-05 | Application Number: 15/726,905 | Filing Date: 2017-10-06 | Inventor： Schrank, Franz Schrems, Martin Kraft, Jochen | Assignee: ams AG | IPC: H01L21/48 | Abstract: The method of producing an interposer-chip-arrangement, comprises providing an interposer (1) with an integrated circuit (25), arranging a dielectric layer (2) with metal layers embedded in the dielectric layer above a main surface (10) of the interposer, connecting the integrated circuit with at least one of the metal layers, forming an interconnection (7) through the interposer, the interconnection contacting one of the metal layers, arranging a further dielectric layer (3) above a further main surface (11) of the interposer opposite the main surface and arranging a further metal layer in or on the further dielectric layer, the further metal layer being connected with the interconnection, arranging a chip provided with at least one contact pad at the main surface or at the further main surface, and electrically conductively connecting the contact pad with the interconnection. | |||
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56 | US2018226514A1 |
METHOD OF PRODUCING AN OPTICAL SENSOR AT WAFER-LEVEL AND OPTICAL SENSOR
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Publication/Patent Number: US2018226514A1 | Publication Date: 2018-08-09 | Application Number: 15/746,342 | Filing Date: 2016-07-22 | Inventor： Schrank, Franz Bodner, Thomas Toschkoff, Gregor Etschmaier, Harald | Assignee: ams AG | IPC: H01L23/00 | Abstract: A method of producing an optical sensor at wafer-level, comprising the steps of providing a wafer having a main top surface and a main back surface and arrange at or near the top surface of the wafer at least one first integrated circuit having at least one light sensitive component. Furthermore, providing in the wafer at least one through-substrate via for electrically contacting the top surface and back surface and forming a first mold structure by wafer-level molding a first mold material over the top surface of the wafer, such that the first mold structure at least partly encloses the first integrated circuit. Finally, forming a second mold structure by wafer-level molding a second mold material over the first mold structure, such that the second mold structure at least partly encloses the first mold structure. | |||
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57 | US9870988B2 |
Method of producing a semiconductor device with through-substrate via covered by a solder ball
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Publication/Patent Number: US9870988B2 | Publication Date: 2018-01-16 | Application Number: 15/691,654 | Filing Date: 2017-08-30 | Inventor： Schrems, Martin Schrank, Franz Teva, Jordi | Assignee: ams AG | IPC: H01L23/552 | Abstract: A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side. A solder ball is placed above the opening and a reflow of the solder ball is effected, thereby forming a void of the through-substrate via, the void being covered by the solder ball. | |||
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58 | EP3385218A1 |
SEMICONDUCTOR DEVICE
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Publication/Patent Number: EP3385218A1 | Publication Date: 2018-10-10 | Application Number: 17164598.9 | Filing Date: 2017-04-03 | Inventor： Faes, Alessandro Siegert, Jörg Schrank, Franz | Assignee: AMS AG | IPC: B81B7/00 | Abstract: A semiconductor device (10) comprises a cap body (11), an environmental sensor (12), a substrate body (13) and a first volume of gas (14). A trench (15) extends through at least a part of the substrate body (13) in a vertical direction (z), the trench (15) being connected to the first volume of gas (14) and the vertical direction (z) being perpendicular to lateral directions (x) that are parallel to the main plane of extension of the semiconductor device (10). Furthermore, a channel (16) connects the first volume of gas (14) and the trench (15) with the environment of the semiconductor device (10) such that the channel (16) is permeable for gases and the environmental sensor (12) and the first volume of gas (14) are arranged between the cap body (11) and the substrate body (13) in vertical direction (z). | |||
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59 | EP3312874A1 |
METHOD OF FORMING A THROUGH-SUBSTRATE VIA AND A SEMICONDUCTOR DEVICE COMPRISING A THROUGH-SUBSTRATE VIA
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Publication/Patent Number: EP3312874A1 | Publication Date: 2018-04-25 | Application Number: 16194866.6 | Filing Date: 2016-10-20 | Inventor： Kraft, Jochen Parteder, Georg Jessenig, Stefan Schrank, Franz | Assignee: ams AG | IPC: H01L21/768 | Abstract: The method of forming a through-substrate via comprises providing a substrate (1) with a dielectric (2) arranged on the substrate (1) and with a metal layer (3) embedded in the dielectric (2), forming a via hole (9) penetrating the substrate (1), removing the dielectric (2) from above the metal layer (3), so that the via hole (9) reaches the metal layer (3), and a contact area (10) of the metal layer (3) is exposed inside the via hole (9), applying an insulation layer (11) in the via hole (9), removing the insulation layer (11) from above the metal layer (3), and applying a metallization (12) in the via hole (9), the metallization (12) contacting a contact area (10) of the metal layer (3) and being insulated from the substrate (1) by the insulation layer (11). | |||
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60 | EP1891673B1 |
PHOTODIODE WITH INTEGRATED SEMICONDUCTOR CIRCUIT AND METHOD FOR THE PRODUCTION THEREOF
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Publication/Patent Number: EP1891673B1 | Publication Date: 2018-12-05 | Application Number: 06743036.3 | Filing Date: 2006-05-23 | Inventor： Meinhardt, Gerald Schrank, Franz Vescoli, Verena | Assignee: ams AG | IPC: H01L27/146 |
3.Current Quota