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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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61
US2018323320A1
OPTICAL PACKAGE AND METHOD OF PRODUCING AN OPTICAL PACKAGE
Publication/Patent Number: US2018323320A1 Publication Date: 2018-11-08 Application Number: 15/773,539 Filing Date: 2016-11-04 Inventor: Mehrl, David   Bodner, Thomas   Toschkoff, Gregor   Etschmaier, Harald   Schrank, Franz   Assignee: ams AG   IPC: H01L31/0232 Abstract: An optical package is proposed comprising a carrier, an optoelectronic component, an aspheric lens, and a reflective layer. The carrier comprises electrical interconnections and the optoelectric component is arranged for emitting and/or detecting electromagnetic radiation in a specified wavelength range. Furthermore, the optoelectric component is mounted on the carrier or integrated into the carrier and electrically connected to the electric interconnections. The aspheric lens has an upper surface, a lateral surface, and a bottom surface and the bottom surface is arranged on or near the optoelectric component. The aspheric lens comprises a material which is at least transparent in the specified wavelength range. The reflective layer comprises a reflective material, wherein the reflective layer at least partly covers the lateral surface of the aspheric lens, and wherein the reflective material is at least partly reflective in the specified wavelength range.
62
US2018006074A1
SENSOR CHIP STACK AND METHOD OF PRODUCING A SENSOR CHIP STACK
Publication/Patent Number: US2018006074A1 Publication Date: 2018-01-04 Application Number: 15/636,545 Filing Date: 2017-06-28 Inventor: Schrank, Franz   Fitzi, Andreas   Forsyth, Richard   Fitzi, Andreas   Parteder, Georg   Assignee: AMS International AG   IPC: H04N5/225 Abstract: The sensor chip stack comprises a sensor substrate of a semiconductor material including a sensor, a chip fastened to the sensor substrate, the chip including an integrated circuit, electric interconnections between the sensor substrate and the chip, electric terminals of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.
63
EP3267484A1
SENSOR CHIP STACK AND METHOD OF PRODUCING A SENSOR CHIP STACK
Publication/Patent Number: EP3267484A1 Publication Date: 2018-01-10 Application Number: 16177777.6 Filing Date: 2016-07-04 Inventor: Schrank, Franz   Fitzi, Andreas   Troxler, Thomas   Kraft, Jochen   Parteder, Georg   Assignee: ams international AG   IPC: H01L27/146 Abstract: The sensor chip stack comprises a sensor substrate (1) of a semiconductor material including a sensor, a chip (10) fastened to the sensor substrate, the chip including an integrated circuit (11), electric interconnections (4) between the sensor substrate and the chip, electric terminals (19) of the chip, the chip being arranged between the electric terminals and the sensor substrate, and a molding material (13) arranged adjacent to the chip, the electric terminals of the chip being free from the molding material.
64
TW201832341A
Semiconductor device
Publication/Patent Number: TW201832341A Publication Date: 2018-09-01 Application Number: 107105265 Filing Date: 2018-02-13 Inventor: Schrank, Franz   Kraft, Jochen   Parteder, Georg   Coppeta, Raffaele   Singulani, Anderson   Assignee: AMS AG   IPC: H01L23/538 Abstract: A semiconductor device (10) comprises a semiconductor body (11) and an electrically conductive via (12) which extends through at least a part of the semiconductor body (11), where the via (12) has a lateral size which is given in a first lateral direction (x) that is perpendicular to a vertical direction (z) given by the main axis of extension of the via (12) and where the via (12) has a top side (13) and a bottom side (14) that faces away from the top side (13). The semiconductor device (10) further comprises an electrically conductive etch-stop layer (15) arranged at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x), and at least one electrically conductive contact layer (16) at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x). The lateral extent in the first lateral direction (x) of the etch-stop layer (15) is larger than the lateral size of the via (12) and the lateral extent in the first lateral direction (x) of the contact layer (16) is smaller than the lateral size of the via (12). Furthermore, the etch-stop layer (15) is arranged between the electrically conductive via (12) and the contact layer (16) in the vertical direction (z).
65
EP3364454A1
SEMICONDUCTOR DEVICE
Publication/Patent Number: EP3364454A1 Publication Date: 2018-08-22 Application Number: 17156319.0 Filing Date: 2017-02-15 Inventor: Kraft, Jochen   Parteder, Georg   Singulani, Anderson   Coppeta, Raffaele   Schrank, Franz   Assignee: AMS AG   IPC: H01L23/48 Abstract: A semiconductor device (10) comprises a semiconductor body (11) and an electrically conductive via (12) which extends through at least a part of the semiconductor body (11), where the via (12) has a lateral size which is given in a first lateral direction (x) that is perpendicular to a vertical direction (z) given by the main axis of extension of the via (12) and where the via (12) has a top side (13) and a bottom side (14) that faces away from the top side (13). The semiconductor device (10) further comprises an electrically conductive etch-stop layer (15) arranged at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x), and at least one electrically conductive contact layer (16) at the bottom side (14) of the via (12) in a plane which is parallel to the first lateral direction (x). The lateral extent in the first lateral direction (x) of the etch-stop layer (15) is larger than the lateral size of the via (12) and the lateral extent in the first lateral direction (x) of the contact layer (16) is smaller than the lateral size of the via (12). Furthermore, the etch-stop layer (15) is arranged between the electrically conductive via (12) and the contact layer (16) in the vertical direction (z).
66
EP3301425A1
PRESSURE SENSOR DEVICE AND METHOD FOR FORMING A PRESSURE SENSOR DEVICE
Publication/Patent Number: EP3301425A1 Publication Date: 2018-04-04 Application Number: 16196616.3 Filing Date: 2016-10-31 Inventor: Siegert, Jörg   Besling, Willem Frederik Adrianus   Tak, Coenraad Cornelis   Schrems, Martin   Schrank, Franz   Assignee: ams International AG   IPC: G01L19/04 Abstract: A pressure sensor device (10) comprises a substrate body (11), a pressure sensor (12) comprising a membrane (13), and a cap body (14) comprising at least one opening (15). The pressure sensor (12) is arranged between the substrate body (11) and the cap body (14) in a vertical direction (z) which is perpendicular to the main plane of extension of the substrate body (11), and the mass of the substrate body (11) equals approximately the mass of the cap body (14). Furthermore, a method for forming a pressure sensor device (10) is provided.
67
US9543245B2
Semiconductor sensor device and method of producing a semiconductor sensor device
Publication/Patent Number: US9543245B2 Publication Date: 2017-01-10 Application Number: 14/441,165 Filing Date: 2013-09-23 Inventor: Schrank, Franz   Schrems, Martin   Assignee: ams AG   IPC: G01N27/12 Abstract: The semiconductor device comprises a substrate (1) of semiconductor material with a front side (4) and an opposite rear side (7), a wiring layer (5) at the front side (4), a further wiring layer (8) at the rear side (7), and a through-substrate via (3) connecting the wiring layer (5) and the further wiring layer (8). A hot plate (24) is arranged on or in the substrate, and a sensor layer (21) is arranged in the vicinity of the hot plate. A mold compound (14) is arranged on the rear side (7) above the substrate (1), a cavity (17) is formed in the mold compound (14) to accommodate the sensor layer (21), and the cavity (17) is covered with a membrane (15).
68
EP2573829A3
Light emitting diode module
Publication/Patent Number: EP2573829A3 Publication Date: 2017-01-25 Application Number: 12198155.9 Filing Date: 2007-10-16 Inventor: Schrank, Franz   Hoschopf, Hans   Assignee: Tridonic Jennersdorf GmbH   Lumitech Produktion und Entwicklung GmbH   IPC: H01L33/52 Abstract: A method for manufacturing a electronic and/or optoelectronic module comprises the following steps: - mounting a electronic and/or optoelectronic chip on a board, - making on the board an outer ring made from a liquid resin, the outer ring surrounding the electronic and/or optoelectronic chip, - making a central filling of the volume defined by the outer ring, the central filling being made from a liquid resin and covering the top surface of the electronic and/or optoelectronic chip, - curing in one single step the resin of the outer ring and the central filling and making a chemically linked interface between the outer ring and the central filling.
69
US9574723B2
LED module, LED illumination means, and LED lamp for the energy-efficient reproduction of white light
Publication/Patent Number: US9574723B2 Publication Date: 2017-02-21 Application Number: 14/944,065 Filing Date: 2015-11-17 Inventor: Baumgartner, Erwin   Schrank, Franz   Assignee: LUMITECH PRODUKTION UND ENTWICKLUNG GMBH   IPC: H01J1/62 Abstract: An LED module, selectively comprising at least zero, one, or a plurality of LEDs from Group B and/or Group G and/or Group R and at least one or more LEDs from Group P. The concentration of phosphors/phosphor mixtures of the LEDs in Group P is selected such that the photometric efficiency (lm/W) thereof is at or near the maximum as a function of the CIE x-coordinates.
70
US9570390B2
Semiconductor device with integrated hot plate and recessed substrate and method of production
Publication/Patent Number: US9570390B2 Publication Date: 2017-02-14 Application Number: 14/651,197 Filing Date: 2013-12-05 Inventor: Schrank, Franz   Schrems, Martin   Assignee: AMS AG   IPC: H01L23/34 Abstract: The semiconductor device comprises a substrate of semiconductor material, a dielectric layer on the substrate, an electrically conductive contact pad arranged in the dielectric layer, a hot plate arranged in the dielectric layer, a recess of the substrate at the location of the hot plate, and an integrated circuit, which operates the hot plate. An electrically conductive layer is arranged on a side of the substrate opposite the dielectric layer. The substrate is provided with a via hole above the contact pad, and an electrically conductive material connecting the electrically conductive layer with the contact pad is applied in the via hole. The recess and the via hole are formed in the same process step.
71
DE102011009373B4
Fotodiodenbauelement
Title (English): Photoelectric component
Publication/Patent Number: DE102011009373B4 Publication Date: 2017-08-03 Application Number: 102011009373 Filing Date: 2011-01-25 Inventor: Schrank, Franz   Teva, Jordi Dr   Assignee: Austriamicrosystems AG   IPC: H01L27/146 Abstract: Fotodiodenbauelement mit – einer elektrisch leitfähigen Kathodenschicht (3) an einer Fotodiodenschicht (4) aus einem Halbleitermaterial
72
US9684074B2
Optical sensor arrangement and method of producing an optical sensor arrangement
Publication/Patent Number: US9684074B2 Publication Date: 2017-06-20 Application Number: 15/101,893 Filing Date: 2014-12-03 Inventor: Schrank, Franz   Dierschke, Eugene G.   Schrems, Martin   Assignee: AMS AG   IPC: H01L33/00 Abstract: An optical sensor arrangement, in particular an optical proximity sensor arrangement comprises a three-dimensional integrated circuit further comprising a first layer comprising a light-emitting device, a second layer comprising a light-detector and a driver circuit. The driver circuit is electrically connected to the light-emitting device and to the light-detector to control the operation of the light-emitting device and the light-detector. A mold layer comprising a first light-barrier between the light-emitting device and the light-detector configured to block light from being transmitted directly from the light-emitting device to the light-detector.
73
EP3211303A1
LED-MODULE
Publication/Patent Number: EP3211303A1 Publication Date: 2017-08-30 Application Number: 17154292.1 Filing Date: 2017-02-02 Inventor: Fink, Bernhard   Schrank, Franz   Pfeiler-deutschmann, Martin   Assignee: Tridonic Jennersdorf GmbH   IPC: F21Y105/14 Abstract: Die Erfindung bezieht sich auf ein LED-Modul (10), insbesondere LED-Spotlight Modul, umfassend: - ein Gehäuseelement (11) vorzugsweise aus Kunststoff, mit zumindest einer Lichtabgabeöffnung (12); - zumindest eine Modulplatte mit zumindest einem Lichtfeld (13), auf dem zumindest eine Leuchtdiode (14) angeordnet ist, wobei die Modulplatte derart am Gehäuseelement (11) angeordnet ist, dass das Lichtfeld (13) in der oder unterhalb der Lichtabgabeöffnung (12) des Gehäuseelements (11) angeordnet ist, und wobei die Modulplatte eine Leiterplatte (15) und eine Trägerplatte (16) umfasst; - wobei an der Innenseite der Lichtabgabeöffnung (12) zumindest ein umlaufendes Wärmeleitelement (17) angeordnet ist, das mit der Trägerplatte (16) der Modulplatte thermisch in Kontakt steht, - wobei das Wärmeleitelement (17) zumindest zwei Anlageflächen (20) umfasst, die mit der Trägerplatte (16) oder mit korrespondierend ausgebildeten Anlageflächen der Trägerplatte (16) in thermischen Kontakt stehen.
74
US2017365551A1
METHOD OF PRODUCING A SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA COVERED BY A SOLDER BALL
Publication/Patent Number: US2017365551A1 Publication Date: 2017-12-21 Application Number: 15/691,654 Filing Date: 2017-08-30 Inventor: Cassidy, Cathal   Schrems, Martin   Schrank, Franz   Assignee: ams AG   IPC: H01L23/522 Abstract: A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side. A solder ball is placed above the opening and a reflow of the solder ball is effected, thereby forming a void of the through-substrate via, the void being covered by the solder ball.
75
EP3121853A1
METHOD OF PRODUCING AN OPTICAL SENSOR AT WAFER-LEVEL AND OPTICAL SENSOR
Publication/Patent Number: EP3121853A1 Publication Date: 2017-01-25 Application Number: 15178053.3 Filing Date: 2015-07-23 Inventor: Etschmaier, Harald   Toschkoff, Gregor   Bodner, Thomas   Schrank, Franz   Assignee: ams AG   IPC: H01L31/0203 Abstract: A method of producing an optical sensor at wafer-level, comprising the steps of providing a wafer (1) having a main top surface (10) and a main back surface (13) and arrange at or near the top surface (10) of the wafer at least one first integrated circuit (11) having at least one light sensitive component (12). Furthermore, providing in the wafer (1) at least one through-substrate via (14) for electrically contacting the at least one first integrated circuit (11) via the back surface (13) and forming a transparent first mold structure (2) by wafer-level molding a first mold material over the top surface (10) of the wafer (1), such that the first mold structure (2) at least partly encloses the first integrated circuit (11). Finally, forming an opaque second mold structure (3) by wafer-level molding a second mold material over the first mold structure (2), such that the second mold structure (3) at least partly encloses the first mold structure (2), leaving an aperture (30) open on top of the at least one top surface (21) of the transparent first mold structure (2).
76
EP3193368A1
AN OPTOELECTRONIC DEVICE WITH A REFRACTIVE ELEMENT AND A METHOD OF PRODUCING SUCH AN OPTOELECTRONIC DEVICE
Publication/Patent Number: EP3193368A1 Publication Date: 2017-07-19 Application Number: 16151134.0 Filing Date: 2016-01-13 Inventor: Schrank, Franz   Siegert, JÖrg   Hofrichter, Jens   Assignee: ams AG   IPC: H01L27/146 Abstract: A top surface (10) of a substrate (1) is provided with a detection element (5) for detecting electromagnetic radiation. A refractive element (23) is formed by a portion of a cover element (2), which is attached to the substrate (1), so that the refractive element (23) is arranged facing the detection element (5). The refractive element (23) may be arranged within a recess (22) of the cover element (2), so that a cavity (4) is formed between the detection element (5) and the refraction element (23).
77
WO2017121572A1
AN OPTOELECTRONIC DEVICE WITH A REFRACTIVE ELEMENT AND A METHOD OF PRODUCING SUCH AN OPTOELECTRONIC DEVICE
Publication/Patent Number: WO2017121572A1 Publication Date: 2017-07-20 Application Number: 2016081224 Filing Date: 2016-12-15 Inventor: Schrank, Franz   Hofrichter, Jens   Siegert, JÖrg   Assignee: AMS AG   IPC: H01L27/146 Abstract: A top surface (10) of a substrate (1) is provided with a detection element (5) for detecting electromagnetic radiation. A refractive element (23) is formed by a portion of a cover element (2)
78
US9818724B2
Interposer-chip-arrangement for dense packaging of chips
Publication/Patent Number: US9818724B2 Publication Date: 2017-11-14 Application Number: 14/561,164 Filing Date: 2014-12-04 Inventor: Kraft, Jochen   Schrems, Martin   Schrank, Franz   Assignee: AMS AG   IPC: H01L23/495 Abstract: The interposer-chip-arrangement comprises an interposer (1), metal layers arranged above a main surface (10), a further metal layer arranged above a further main surface (11) opposite the main surface, an electrically conductive interconnection (7) through the interposer, the interconnection connecting one of the metal layers and the further metal layer, a chip (12) arranged at the main surface or at the further main surface, the chip having a contact pad (15), which is electrically conductively connected with the interconnection, a dielectric layer (2) arranged above the main surface with the metal layers embedded in the dielectric layer, a further dielectric layer (3) arranged above the further main surface with the further metal layer embedded in the further dielectric layer, and an integrated circuit (25) in the interposer, the integrated circuit being connected with at least one of the metal layers (5).
79
US2017025351A1
SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA COVERED BY A SOLDER BALL
Publication/Patent Number: US2017025351A1 Publication Date: 2017-01-26 Application Number: 15/283,183 Filing Date: 2016-09-30 Inventor: Cassidy, Cathal   Schrems, Martin   Schrank, Franz   Assignee: ams AG   IPC: H01L23/522 Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises an annular cavity (18) and a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for three-dimensional integration is offered by this scheme.
80
US9553039B2
Semiconductor device with through-substrate via covered by a solder ball and related method of production
Publication/Patent Number: US9553039B2 Publication Date: 2017-01-24 Application Number: 14/359,568 Filing Date: 2012-11-07 Inventor: Cassidy, Cathal   Schrems, Martin   Schrank, Franz   Assignee: AMS AG   IPC: H01L23/48 Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for three dimensional integration is offered by this scheme.
Total 19 pages