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101 | EP2772939B1 |
Semiconductor device for detection of radiation and method of producing a semiconductor device for detection of radiation
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Publication/Patent Number: EP2772939B1 | Publication Date: 2016-10-19 | Application Number: 13157432.9 | Filing Date: 2013-03-01 | Inventor： Enichlmair, Hubert Schrank, Franz Siegert, Jörg | Assignee: AMS AG | IPC: H01L27/146 | Abstract: The semiconductor device for detection of radiation comprises a semiconductor substrate (1) with a main surface (11), a dielectric layer (6) comprising at least one compound of a semiconductor material, an integrated circuit (2) including at least one component sensitive to radiation (3), a wiring (4) of the integrated circuit, an electrically conductive through-substrate via (5) contacting the wiring, and a structured filter layer (7) arranged immediately on the dielectric layer above the component sensitive to radiation. | |||
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102 | US2016020238A1 |
SEMICONDUCTOR DEVICE FOR DETECTION OF RADIATION AND METHOD OF PRODUCING A SEMICONDUCTOR DEVICE FOR DETECTION OF RADIATION
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Publication/Patent Number: US2016020238A1 | Publication Date: 2016-01-21 | Application Number: 14/772,055 | Filing Date: 2014-02-24 | Inventor： Enichlmair, Hubert Schrank, Franz Siegert, Joerg | Assignee: ams AG | IPC: H01L27/146 | Abstract: The semiconductor device for detection of radiation comprises a semiconductor substrate (1) with a main surface (11), a dielectric layer (6) comprising at least one compound of a semiconductor material, an integrated circuit (2) including at least one component sensitive to radiation (3), a wiring (4) of the integrated circuit embedded in an intermetal layer (8) of the dielectric layer (6), an electrically conductive through-substrate via (5) contacting the wiring, and an optical filter element (7) arranged immediately on the dielectric layer above the component sensitive to radiation. The dielectric layer comprises a passivation layer (9) at least above the through-substrate via, the passivation layer comprises a dielectric material that is different from the intermetal layer (8), and the wiring is arranged between the main surface and the passivation layer. | |||
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103 | US2016322519A1 |
SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA AND CORRESPONDING METHOD OF MANUFACTURE
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Publication/Patent Number: US2016322519A1 | Publication Date: 2016-11-03 | Application Number: 15/107,901 | Filing Date: 2014-12-12 | Inventor： Schrank, Franz Carniello, Sara Enichlmair, Hubert Kraft, Jochen Loeffler, Bernhard Holzhaider, Rainer | Assignee: AMS AG | IPC: H01L31/0224 | Abstract: A dielectric layer (2) is arranged on the main surface (10) of a semiconductor substrate (1), and a passivation layer (6) is arranged on the dielectric layer. A metal layer (3) is embedded in the dielectric layer above an opening (12) in the substrate, and a metallization (14) is arranged in the opening. The metallization contacts the metal layer and forms a through-substrate via to a rear surface (11) of the substrate. A layer or layer sequence (7, 8, 9) comprising at least one further layer is arranged on the passivation layer above the opening. In this way the bottom of the through-substrate via is stabilized. A plug (17) may additionally be arranged in the opening without filling the opening. | |||
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104 | EP2917935A1 |
SEMICONDUCTOR SENSOR DEVICE AND METHOD OF PRODUCING A SEMICONDUCTOR SENSOR DEVICE
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Publication/Patent Number: EP2917935A1 | Publication Date: 2015-09-16 | Application Number: 13770656.0 | Filing Date: 2013-09-23 | Inventor： Schrank, Franz Schrems, Martin | Assignee: AMS AG | IPC: H01L23/31 | ||||
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105 | WO2015110332A1 |
SEMICONDUCTOR DEVICE FOR OPTICAL APPLICATIONS AND METHOD OF PRODUCING SUCH A SEMICONDUCTOR DEVICE
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Publication/Patent Number: WO2015110332A1 | Publication Date: 2015-07-30 | Application Number: 2015050587 | Filing Date: 2015-01-14 | Inventor： Schrank, Franz Enichlmair, Hubert | Assignee: AMS AG | IPC: H01L31/0203 | Abstract: A sensor (2) is arranged at a main surface (10) of a semiconductor substrate (1) | |||
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106 | US9054261B2 |
Photodiode device and method for production thereof
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Publication/Patent Number: US9054261B2 | Publication Date: 2015-06-09 | Application Number: 13/981,302 | Filing Date: 2012-01-24 | Inventor： Teva, Jordi Schrank, Franz | Assignee: ams AG | IPC: H01L27/14 | Abstract: The photodiode device has an electrically conductive cathode layer (3) at a photodiode layer (4) composed of a semiconductor material. Doped anode regions (5) are situated at a top side of the photodiode layer facing away from the cathode layer. A trench (14) subdivides the photodiode layer. A conductor layer (7) is arranged in or at the trench and electrically conductively connects the cathode layer with a cathode connection (11). Anode connections (12) are electrically conductively connected with the anode regions. | |||
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107 | US9206947B2 |
LED module, LED illumination means, and LED lamp for the energy-efficient reproduction of white light
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Publication/Patent Number: US9206947B2 | Publication Date: 2015-12-08 | Application Number: 12/723,487 | Filing Date: 2010-03-12 | Inventor： Baumgartner, Erwin Schrank, Franz | Assignee: LUMITECH PRODUKTION UND ENTWICKLUNG GMBH | IPC: H01J1/62 | Abstract: An LED module, selectively comprising at least zero, one, or a plurality of LEDs from Group B and/or Group G and/or Group R and at least one or more LEDs from Group P. The concentration of phosphors/phosphor mixtures of the LEDs in Group P is selected such that the photometric efficiency (lm/W) thereof is at or near the maximum as a function of the CIE x-coordinates. | |||
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108 | US2015287674A1 |
SEMICONDUCTOR SENSOR DEVICE AND METHOD OF PRODUCING A SEMICONDUCTOR SENSOR DEVICE
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Publication/Patent Number: US2015287674A1 | Publication Date: 2015-10-08 | Application Number: 14/441,165 | Filing Date: 2013-09-23 | Inventor： Schrank, Franz Schrems, Martin | Assignee: AMS AG | IPC: H01L23/528 | Abstract: The semiconductor device comprises a substrate (1) of semiconductor material with a front side (4) and an opposite rear side (7), a wiring layer (5) at the front side (4), a further wiring layer (8) at the rear side (7), and a through-substrate via (3) connecting the wiring layer (5) and the further wiring layer (8). A hot plate (24) is arranged on or in the substrate, and a sensor layer (21) is arranged in the vicinity of the hot plate. A mold compound (14) is arranged on the rear side (7) above the substrate (1), a cavity (17) is formed in the mold compound (14) to accommodate the sensor layer (21), and the cavity (17) is covered with a membrane (15). | |||
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109 | DE102014200606A1 |
Beleuchtetes Fensterelement
Title (English):
Lighting window element
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Publication/Patent Number: DE102014200606A1 | Publication Date: 2015-07-16 | Application Number: 102014200606 | Filing Date: 2014-01-15 | Inventor： Hoschopf, Hans Schrank, Franz Dr | Assignee: TRIDONIC JENNERSDORF GMBH | IPC: E06B3/66 | Abstract: Beleuchtungsanordnung für ein Fensterelement 10 | |||
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110 | EP2844909A1 |
LIGHTING UNIT
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Publication/Patent Number: EP2844909A1 | Publication Date: 2015-03-11 | Application Number: 13722350.9 | Filing Date: 2013-05-03 | Inventor： Schrank, Franz Rinderhofer, Alexander | Assignee: Tridonic Jennersdorf GmbH | IPC: F21K99/00 | ||||
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111 | EP2899760A1 |
Semiconductor device for optical applications and method of producing such a semiconductor device
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Publication/Patent Number: EP2899760A1 | Publication Date: 2015-07-29 | Application Number: 14152688.9 | Filing Date: 2014-01-27 | Inventor： Enichlmair, Hubert Schrank, Franz | Assignee: ams AG | IPC: H01L31/0203 | Abstract: A sensor (2) is arranged at a main surface (10) of a semiconductor substrate (1), and a filter (3) is arranged above the sensor. A through-substrate via (4) penetrates the substrate outside the region of the sensor. A semiconductor body is applied above the main surface and then partially removed at least in an area above the sensor. A portion of the semiconductor body remains above the through-substrate via as a frame layer (5). The filter is on a level with the frame layer. | |||
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112 | EP2660503B1 |
Lamp
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Publication/Patent Number: EP2660503B1 | Publication Date: 2015-12-30 | Application Number: 12166723.2 | Filing Date: 2012-05-04 | Inventor： Schrank, Franz Rinderhofer, Alexander | Assignee: Tridonic Jennersdorf GmbH | IPC: F21V3/04 | Abstract: The lamp has an LED (16) that is arranged at specific distance from a screen (20) so that light from the LED falls on an inner side of screen. A light transmission layer (S1) of screen is set for transmitting light of first wavelength (L1). A color conversion layer (S2) is made of color-converting phosphor material and support material. A light transmission layer (S3) is set for transmitting light of first wavelength and second wavelength (L2) which is larger than first wavelength. The light transmission layers are made of plastic or glass material. | |||
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113 | US2015303141A1 |
SEMICONDUCTOR DEVICE WITH INTEGRATED HOT PLATE AND RECESSED SUBSTRATE AND METHOD OF PRODUCTION
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Publication/Patent Number: US2015303141A1 | Publication Date: 2015-10-22 | Application Number: 14/651,197 | Filing Date: 2013-12-05 | Inventor： Schrank, Franz Schrems, Martin | Assignee: ams AG | IPC: H01L23/528 | Abstract: The semiconductor device comprises a substrate of semiconductor material, a dielectric layer on the substrate, an electrically conductive contact pad arranged in the dielectric layer, a hot plate arranged in the dielectric layer, a recess of the substrate at the location of the hot plate, and an integrated circuit, which operates the hot plate. An electrically conductive layer is arranged on a side of the substrate opposite the dielectric layer. The substrate is provided with a via hole above the contact pad, and an electrically conductive material connecting the electrically conductive layer with the contact pad is applied in the via hole. The recess and the via hole are formed in the same process step. | |||
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114 | JP2015156520A |
LED MODULE
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Publication/Patent Number: JP2015156520A | Publication Date: 2015-08-27 | Application Number: 2015104412 | Filing Date: 2015-05-22 | Inventor： Schrank, Franz Erwin, Baumgartner | Assignee: LUMITECH PRODUKTION & ENTWICKLUNG GMBH | IPC: F21S2/00 | Abstract: 【課題】本発明の課題は、ＬＥＤ照明具とＬＥＤランプのためのＬＥＤモジュールを提供することである。【解決手段】本発明は、グループＢ及び／又はグループＧ及び／又はグループＲのうちの少なくともゼロ個、１個又は複数個のＬＥＤと、グループＰの少なくとも１個又は複数個のＬＥＤから選択的に構成されるＬＥＤモジュールに関連するが、ＣＩＥ ｘ座標による発光効率（ｌｍ／Ｗ）を最大又は最大近傍となるようにグループＰの前記ＬＥＤの蛍光体／混色蛍光体の濃度を選択することを特徴とする。【選択図】図１ | |||
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115 | US2015340264A1 |
METHOD OF APPLICATION OF A CARRIER TO A DEVICE WAFER
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Publication/Patent Number: US2015340264A1 | Publication Date: 2015-11-26 | Application Number: 14/759,400 | Filing Date: 2014-01-08 | Inventor： Siegert, Joerg Schrems, Martin Kraft, Jochen Schrank, Franz | Assignee: AMS AG | IPC: H01L21/683 | Abstract: A device wafer having a main surface including an edge region and a carrier having a further main surface including an annular surface region corresponding to the edge region of the device wafer are provided. An adhesive is applied in the edge region and/or in the annular surface region, but not on the remaining areas of the main surfaces. The device wafer is fastened to the carrier by the adhesive. The main surface and the further main surface are brought into contact with one another when the device wafer is fastened to the carrier, while the main surface and the further main surface are fastened to one another only in the edge region. The device wafer is removed from the carrier after further process steps, which may include the formation of through-wafer vias in the device wafer. | |||
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116 | EP2881753A1 |
Optical sensor arrangement and method of producing an optical sensor arrangement
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Publication/Patent Number: EP2881753A1 | Publication Date: 2015-06-10 | Application Number: 13199086.3 | Filing Date: 2013-12-20 | Inventor： Schrank, Franz Dierschke, Eugene G. Schrems, Martin | Assignee: ams AG | IPC: G01S7/481 | Abstract: An optical sensor arrangement, in particular an optical proximity sensor arrangement comprises a three-dimensional integrated circuit further comprising a first layer (1) comprising a light-emitting device (LED), a second layer (2) comprising a light-detector (PD) and a driver circuit (IC). The driver circuit is electrically connected to the light-emitting device (LED) and to the light-detector (PD) to control the operation of the light-emitting device (LED) and the light-detector (PD). A mold layer (3) comprising a first light-barrier (33) between the light-emitting device (LED) and the light-detector (PD) configured to block light from being transmitted directly from the light-emitting device (LED) to the light-detector (PD). | |||
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117 | US8969193B2 |
Method of producing a semiconductor device having an interconnect through the substrate
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Publication/Patent Number: US8969193B2 | Publication Date: 2015-03-03 | Application Number: 13/956,274 | Filing Date: 2013-07-31 | Inventor： Kraft, Jochen Schrank, Franz Schrems, Martin | Assignee: ams AG | IPC: H01L21/4763 | Abstract: A semiconductor substrate (1) is provided on a main surface (14) with an intermetal dielectric (4) including metal planes (5) and on an opposite rear surface (15) with an insulation layer (2) and an electrically conductive connection pad (7). An etch stop layer (6) is applied on the intermetal dielectric to prevent a removal of the intermetal dielectric above the metal planes during subsequent method steps. An opening (9) having a side wall (3) and a bottom (13) is formed from the main surface through the substrate above the connection pad. A side wall spacer (10) is formed on the side wall by a production and subsequent partial removal of a dielectric layer (11). The insulation layer is removed from the bottom to uncover an area of the connection pad. A metal layer is applied in the opening and is provided for an interconnect through the substrate. | |||
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118 | US2015129999A1 |
METHOD OF WAFER-SCALE INTEGRATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE
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Publication/Patent Number: US2015129999A1 | Publication Date: 2015-05-14 | Application Number: 14/401,499 | Filing Date: 2013-04-05 | Inventor： Cassidy, Cathal Siegert, Joerg Schrank, Franz | Assignee: ams AG | IPC: H01L27/146 | Abstract: The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit. | |||
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119 | US2015162308A1 |
INTERPOSER-CHIP-ARRANGEMENT FOR DENSE PACKAGING OF CHIPS
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Publication/Patent Number: US2015162308A1 | Publication Date: 2015-06-11 | Application Number: 14/561,164 | Filing Date: 2014-12-04 | Inventor： Kraft, Jochen Schrems, Martin Schrank, Franz | Assignee: ams AG | IPC: H01L25/065 | Abstract: The interposer-chip-arrangement comprises an interposer (1), metal layers arranged above a main surface (10), a further metal layer arranged above a further main surface (11) opposite the main surface, an electrically conductive interconnection (7) through the interposer, the interconnection connecting one of the metal layers and the further metal layer, a chip (12) arranged at the main surface or at the further main surface, the chip having a contact pad (15), which is electrically conductively connected with the interconnection, a dielectric layer (2) arranged above the main surface with the metal layers embedded in the dielectric layer, a further dielectric layer (3) arranged above the further main surface with the further metal layer embedded in the further dielectric layer, and an integrated circuit (25) in the interposer, the integrated circuit being connected with at least one of the metal layers (5). | |||
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120 | EP2854167A1 |
Semiconductor device with through-substrate via covered by a solder ball and related method of production
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Publication/Patent Number: EP2854167A1 | Publication Date: 2015-04-01 | Application Number: 14176547.9 | Filing Date: 2011-11-23 | Inventor： Cassidy, Cathal Schrems, Martin Schrank, Franz | Assignee: ams AG | IPC: H01L23/00 | Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101), which may be filled with air or another gas and forms an annular cavity surrounding a pillar (105). A solder ball (100) closes the void without completely filling it. A variety of interconnections for threedimensional integration is offered by this scheme. |
3.Current Quota