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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
Application Number Application Number Filing Date Filing Date
Inventor Inventor Assignee Assignee IPC IPC
161
EP2082441B1
LIGHT EMITTING DIODE MODULE AND METHOD FOR MANUFACTURING THE SAME
Publication/Patent Number: EP2082441B1 Publication Date: 2013-12-18 Application Number: 07819030.3 Filing Date: 2007-10-16 Inventor: Schrank, Franz   Hoschopf, Hans   Assignee: Tridonic Jennersdorf GmbH   Lumitech Produktion und Entwicklung GmbH   IPC: H01L33/00
162
TWI404427B
Mems-microphon and its production method
Publication/Patent Number: TWI404427B Publication Date: 2013-08-01 Application Number: 94142063 Filing Date: 2005-11-30 Inventor: Schrank, Franz   Schrems, Martin   Assignee: Austriamicrosystems AG   IPC: H04R19/04 Abstract: It is suggested to bond a MEMS-microphon on the surface of an IC component
163
WO2013164451A1
LIGHTING UNIT
Publication/Patent Number: WO2013164451A1 Publication Date: 2013-11-07 Application Number: 2013059257 Filing Date: 2013-05-03 Inventor: Schrank, Franz   Rinderhofer, Alexander   Assignee: TRIDONIC JENNERSDORF GMBH   IPC: F21K99/00 Abstract: The invention relates to a lighting unit comprising a light source (16)
164
WO2013037564A1
METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT USING AN AUXILIARY CARRIER
Publication/Patent Number: WO2013037564A1 Publication Date: 2013-03-21 Application Number: 2012065180 Filing Date: 2012-08-02 Inventor: Schrank, Franz   Siegert, Joerg   Assignee: SCHRANK, FRANZ   SIEGERT, JOERG   AMS AG   IPC: H01L21/683 Abstract: In the method
165
US8530914B2
Optoelectronic components with adhesion agent
Publication/Patent Number: US8530914B2 Publication Date: 2013-09-10 Application Number: 11/994,972 Filing Date: 2006-06-08 Inventor: Schrank, Franz   Pachler, Peter   Assignee: TridonicAtco Optoelectronics Gmbh   Lumitech Produktion und Entwicklung GmbH   IPC: H01L33/00 Abstract: SiO2 layers are used as adhesion layers in the case of optoelectronic components. Durable adhesions can be produced with silicone rubbers. These materials normally have only an insufficient adhesive strength on materials as frequently used for optoelectronic components, such as LED modules. This then leads in further consequence to a clear reduction of the operating life of the manufactured components. These restrictions are avoided effectively by the use of the adhesion layers, endurance upon operation in damp surroundings and upon temperature change loading is substantially improved.
166
EP2660503A1
Lamp
Publication/Patent Number: EP2660503A1 Publication Date: 2013-11-06 Application Number: 12166723.2 Filing Date: 2012-05-04 Inventor: Schrank, Franz   Rinderhofer, Alexander   Assignee: Tridonic Jennersdorf GmbH   IPC: F21K99/00 Abstract: Die Erfindung betrifft eine Leuchte mit einer Lichtquelle (16), die Licht einer ersten Wellenlänge (L1) emittiert, und einem Schirm (20), wobei 1.2.1 der Schirm (20) im Abstand zur Lichtquelle (16) so angeordnet ist, dass das Licht erster Wellenlänge (L1) von der Lichtquelle (16) auf eine Innenseite des Schirms (20) fällt, und der Schirm (20) mindestens dreilagig aufgebaut ist, und zwar, von innen, der Lichtquelle (16) zugewandt, nach außen mit einer ersten Schicht (S1) aus Kunststoff oder Glas, die für das Licht erster Wellenlänge (L1) durchlässig ist, einer Farbkonversionsschicht (S2), aus mindestens einem Farbkonversionsleuchtstoff und mindestens einem Trägermaterial, einer dritten Schicht (S3) aus Kunststoff oder Glas, die für ein Licht erster und zweiter Wellenlänge (L1, L2) durchlässig ist, wobei die zweite Wellenlänge (L2) größer als die erste Wellenlänge (L1) ist.
167
CA2614208C
OPTOELECTRONIC COMPONENTS WITH ADHESION AGENT
Publication/Patent Number: CA2614208C Publication Date: 2013-05-14 Application Number: 2614208 Filing Date: 2006-06-08 Inventor: Schrank, Franz   Pachler, Peter   Assignee: Tridonic Optoelectronics GmbH   LUMITECH PRODUKTION UND ENTWICKLUNG GMBH   IPC: H01L31/0203 Abstract: Si02 layers are used as adhesion layers in the case of optoelectronic components. Durable adhesions can be produced with silicone rubbers. These materials normally have only an insufficient adhesive strength on materials as frequently used for optoelectronic components
168
DE102011113642A1
Verfahren zur Herstellung eines Halbleiterbauelementes unter Verwendung eines Hilfsträgers
Title (English): Fabrication of Semiconductor components from Auxiliary Carrie
Publication/Patent Number: DE102011113642A1 Publication Date: 2013-03-21 Application Number: 102011113642 Filing Date: 2011-09-16 Inventor: Schrank, Franz   Siegert, Joerg   Assignee: Austriamicrosystems AG   IPC: H01L21/302 Abstract: Verfahren zur Herstellung eines Halbleiterbauelementes mit gedünntem Substrat
169
ES2422212T3
Módulo LED
Title (English): Page: 1
Publication/Patent Number: ES2422212T3 Publication Date: 2013-09-09 Application Number: 08801969 Filing Date: 2008-09-10 Inventor: Baumgartner, Erwin   Schrank, Franz   Assignee: LUMITECH PRODUKTION UND ENTWICKLUNG GMBH   IPC: F21K99/00 Abstract: Modulo LED compuesto por (a) al menos un LED de un grupo P de LEDs que comprende uno o mas LEDs estimulantes de fosforos o demezclas de f6sforos y que forman parte de un grupo B de LEDs
170
EP2573829A2
Light emitting diode module
Publication/Patent Number: EP2573829A2 Publication Date: 2013-03-27 Application Number: 12198155.9 Filing Date: 2007-10-16 Inventor: Schrank, Franz   Hoschopf, Hans   Assignee: Tridonic Jennersdorf GmbH   Lumitech Produktion und Entwicklung GmbH   IPC: H01L33/52 Abstract: A method for manufacturing a electronic and/or optoelectronic module comprises the following steps: - mounting a electronic and/or optoelectronic chip on a board, - making on the board an outer ring made from a liquid resin, the outer ring surrounding the electronic and/or optoelectronic chip, - making a central filling of the volume defined by the outer ring, the central filling being made from a liquid resin and covering the top surface of the electronic and/or optoelectronic chip, - curing in one single step the resin of the outer ring and the central filling and making a chemically linked interface between the outer ring and the central filling.
171
EP2290716A3
Cover for optoelectronic components
Publication/Patent Number: EP2290716A3 Publication Date: 2013-01-23 Application Number: 10184330.8 Filing Date: 2007-10-16 Inventor: Schrank, Franz   Hoschopf, Hans   Assignee: Tridonic Jennersdorf GmbH   Lumitech Produktion und Entwicklung GmbH   IPC: H01L33/56 Abstract: A method for manufacturing a electronic and/or optoelectronic module comprises the following steps: - mounting a electronic and/or optoelectronic chip on a board, - making on the board an outer ring made from a liquid resin, the outer ring surrounding the electronic and/or optoelectronic chip, - making a central filling of the volume defined by the outer ring, the central filling being made from a liquid resin and covering the top surface of the electronic and/or optoelectronic chip, - curing in one single step the resin of the outer ring and the central filling and making a chemically linked interface between the outer ring and the central filling.
172
DE102011113642B4
Verfahren zur Herstellung eines Halbleiterbauelementes unter Verwendung eines Hilfsträgers
Publication/Patent Number: DE102011113642B4 Publication Date: 2013-06-06 Application Number: 102011113642 Filing Date: 2011-09-16 Inventor: Schrank, Franz   Siegert, Joerg   Assignee: Austriamicrosystems AG   IPC: H01L21/302 Abstract: Verfahren zur Herstellung eines Halbleiterbauelementes mit gedünntem Substrat
173
EP2597677A1
Semiconductor device with through-substrate via covered by a solder ball and related method of production
Publication/Patent Number: EP2597677A1 Publication Date: 2013-05-29 Application Number: 11190389.4 Filing Date: 2011-11-23 Inventor: Cassidy, Cathal   Schrems, Martin   Schrank, Franz   Assignee: austriamicrosystems AG   IPC: H01L23/48 Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for threedimensional integration is offered by this scheme.
174
US8378496B2
Semiconductor substrate with interlayer connection and method for production of a semiconductor substrate with interlayer connection
Publication/Patent Number: US8378496B2 Publication Date: 2013-02-19 Application Number: 12/670,303 Filing Date: 2008-07-23 Inventor: Schrank, Franz   Schrems, Martin   Kraft, Jochen   Assignee: austriamicrosystems AG   IPC: H01L23/48 Abstract: The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.
175
WO2013075947A1
SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA COVERED BY A SOLDER BALL AND RELATED METHOD OF PRODUCTION
Publication/Patent Number: WO2013075947A1 Publication Date: 2013-05-30 Application Number: 2012072060 Filing Date: 2012-11-07 Inventor: Schrank, Franz   Schrems, Martin   Cassidy, Cathal   Assignee: AMS AG   IPC: H01L21/768 Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises a void (101)
176
WO2013171002A1
A METHOD OF WAFER-SCALE INTEGRATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICE
Publication/Patent Number: WO2013171002A1 Publication Date: 2013-11-21 Application Number: 2013057219 Filing Date: 2013-04-05 Inventor: Schrank, Franz   Siegert, Joerg   Cassidy, Cathal   Assignee: AMS AG   IPC: H01L27/146 Abstract: The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1)
177
US8383488B2
Method for producing a semiconductor component with two trenches
Publication/Patent Number: US8383488B2 Publication Date: 2013-02-26 Application Number: 12/515,224 Filing Date: 2007-10-22 Inventor: Enichlmair, Hubert   Schrems, Martin   Schrank, Franz   Assignee: austriamicrosystems AG   IPC: H01L21/76 Abstract: A method, in which a first isolating trench, filled with a dielectric material, and a second conducting trench, filled with an electrically conductive material, can be produced. To this end, the first and second trenches are etched with different trench widths, so that the first trench is filled completely with the dielectric material after a deposition of a dielectric layer over the entire surface with the edges covered, whereas the wider second trench is covered by the dielectric layer only on the inside walls. By anisotropic back-etching of the dielectric layer, the semiconductor substrate is exposed at the bottom of the second trench. Subsequently, the second trench is filled with an electrically conductive material and then represents a low-ohmic connection from the substrate surface to the buried structure located below the second trench.
178
EP2665096A1
A method of wafer-scale integration of semiconductor devices and semiconductor device
Publication/Patent Number: EP2665096A1 Publication Date: 2013-11-20 Application Number: 12168069.8 Filing Date: 2012-05-15 Inventor: Cassidy, Cathal   Siegert, Jörg   Schrank, Franz   Assignee: austriamicrosystems AG   IPC: H01L27/146 Abstract: The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit.
179
TWI390717B
Photo-diode with integrated semiconductor circuit and method for its production
Publication/Patent Number: TWI390717B Publication Date: 2013-03-21 Application Number: 95117667 Filing Date: 2006-05-18 Inventor: Schrank, Franz   Meinhardt, Gerald   Vescoli, Verena   Assignee: Austriamicrosystems AG   IPC: H01L27/14 Abstract: It is suggested to produce a semiconductor circuit in a semiconductor body and to connect with another substrate
180
KR20130071474A
APPARATUS FOR COATING A WAFER
Publication/Patent Number: KR20130071474A Publication Date: 2013-06-28 Application Number: 20137006971 Filing Date: 2010-10-19 Inventor: Schrank, Franz   Holzleitner, Ronald   Bartel, Johanna   Hoffmann, Raimund   Teva, Jordi   Assignee: EV GROUP GMBH   IPC: H01L21/02
Total 19 pages