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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
Application Number Application Number Filing Date Filing Date
Inventor Inventor Assignee Assignee IPC IPC
1
EP1868239B1
Method of manufacturing trenches in a semiconductor body
Publication/Patent Number: EP1868239B1 Publication Date: 2020-04-22 Application Number: 06012076.3 Filing Date: 2006-06-12 Inventor: Park, Jong Mun   Schrems martin   Assignee: ams AG   IPC: H01L21/762
2
EP2802004B1
Method of structuring a device layer of a recessed semiconductor device and recessed semiconductor device comprising a structured device layer
Publication/Patent Number: EP2802004B1 Publication Date: 2020-11-04 Application Number: 13167088.7 Filing Date: 2013-05-08 Inventor: Löffler, Bernhard   Schrems martin   Assignee: ams AG   IPC: H01L21/311
3
EP3024029B1
Method of producing a semiconductor device comprising an aperture array
Publication/Patent Number: EP3024029B1 Publication Date: 2020-04-22 Application Number: 14193859.7 Filing Date: 2014-11-19 Inventor: Siegert, Jörg   Schrank, Franz   Schrems martin   Assignee: ams AG   IPC: H01L27/146
4
EP3660902A1
SEMICONDUCTOR DEVICE COMPRISING AN APERTURE ARRAY
Publication/Patent Number: EP3660902A1 Publication Date: 2020-06-03 Application Number: 20152454.3 Filing Date: 2014-11-19 Inventor: Siegert, Jörg   Schrank, Franz   Schrems martin   Assignee: AMS AG   IPC: H01L27/146 Abstract: A photosensor (2) is arranged in a semiconductor substrate (1) at a main surface (10), a dielectric layer (4) is arranged on or above the main surface, the dielectric layer including a metal layer (6) electrically connected with the photosensor, and an aperture layer (16) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones (18) above the photosensor, each of the aperture zones penetrating the aperture layer.
5
EP2908335B1
Dicing method
Publication/Patent Number: EP2908335B1 Publication Date: 2020-04-15 Application Number: 14155240.6 Filing Date: 2014-02-14 Inventor: Schrank, Franz   Schrems martin   Stering, Bernhard   Assignee: ams AG   IPC: H01L21/768
6
US10790234B2
Embedding known-good component in known-good cavity of known-good component carrier material with pre-formed electric connection structure
Publication/Patent Number: US10790234B2 Publication Date: 2020-09-29 Application Number: 16/185,283 Filing Date: 2018-11-09 Inventor: Gavagnin, Marco   Leitgeb, Markus   Schrems martin   Winkler, Roland   Anderson, Steve   Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft   IPC: H01L23/538 Abstract: A method of manufacturing a component carrier includes providing a known-good layer stack comprising an already formed electrically conductive connection structure and a known-good cavity, and mounting a known-good component on the already formed electrically conductive connection structure in the cavity.
7
EP3471146B1
METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR
Publication/Patent Number: EP3471146B1 Publication Date: 2020-09-09 Application Number: 17196609.6 Filing Date: 2017-10-16 Inventor: Toschkoff, Gregor   Bodner, Thomas   Schrank, Franz   Labodi, Miklos   Siegert, Jörg   Schrems martin   Assignee: ams AG   IPC: H01L27/146
8
US2020313031A1
METHOD FOR MANUFACTURING AN OPTICAL SENSOR AND OPTICAL SENSOR
Publication/Patent Number: US2020313031A1 Publication Date: 2020-10-01 Application Number: 16/756,025 Filing Date: 2018-10-15 Inventor: Toschkoff, Gregor   Bodner, Thomas   Schrank, Franz   Labodi, Miklos   Siegert, Joerg   Schrems martin   Assignee: ams AG   IPC: H01L31/18 Abstract: A method for manufacturing an optical sensor is provided. The method comprises providing an optical sensor arrangement which comprises at least two optical sensor elements on a carrier, where the optical sensor arrangement comprises a light entrance surface at the side of the optical sensor elements facing away from the carrier. The method further comprises forming a trench between two optical sensor elements in a vertical direction which is perpendicular to the main plane of extension of the carrier, where the trench extends from the light entrance surface of the sensor arrangement at least to the carrier. Moreover, the method comprises coating the trench with an opaque material, forming electrical contacts for the at least two optical sensor elements on a back side of the carrier facing away from the optical sensor elements, and forming at least one optical sensor by dicing the optical sensor arrangement along the trench. Each optical sensor comprises an optical sensor element, and the light entrance surface is free of electrical contacts and at least partially free of the opaque material above the optical sensor elements. Furthermore, an optical sensor is provided.
9
US2019312076A1
SYSTEM-ON-CHIP CAMERA WITH INTEGRATED LIGHT SENSOR(S) AND METHOD OF PRODUCING A SYSTEM-ON-CHIP CAMERA
Publication/Patent Number: US2019312076A1 Publication Date: 2019-10-10 Application Number: 16/309,226 Filing Date: 2017-06-13 Inventor: Schrems martin   Stockmeier, Thomas   Assignee: ams AG   IPC: H01L27/146 Abstract: The system-on-chip camera comprises a semiconductor body (1) with an integrated circuit (40), a sensor substrate (2), sensor elements (3) arranged in the sensor substrate according to an array of pixels, a light sensor (4) in the sensor substrate apart from the sensor elements, and a lens or an array of lenses (15) on a surface of incidence (30). Filter elements (11, 12, 13), which may especially be interference filters for red, green or blue, are arranged between the sensor elements and the surface of incidence.
10
US10217715B2
Semiconductor device with a bump contact on a TSV comprising a cavity and method of producing such a semiconductor device
Publication/Patent Number: US10217715B2 Publication Date: 2019-02-26 Application Number: 15/118,469 Filing Date: 2015-02-09 Inventor: Schrems martin   Stering, Bernhard   Etschmaier, Harald   Assignee: ams AG   IPC: H01L23/00 Abstract: The semiconductor device comprises a semiconductor substrate (1) with a main surface (10) and a further main surface (11) opposite the main surface, a TSV (3) penetrating the substrate from the main surface to the further main surface, a metallization (13) of the TSV, an under-bump metallization (5) and a bump contact (6) at least partially covering the TSV at the further main surface. The TSV (3) comprises a cavity (15), which may be filled with a gas or liquid. An opening (15′) of the cavity is provided to expose the cavity to the environment.
11
US10340254B2
Method of producing an interposer-chip-arrangement for dense packaging of chips
Publication/Patent Number: US10340254B2 Publication Date: 2019-07-02 Application Number: 15/726,905 Filing Date: 2017-10-06 Inventor: Kraft, Jochen   Schrems martin   Schrank, Franz   Assignee: ams AG   IPC: H01L21/00 Abstract: The method of producing an interposer-chip-arrangement, comprises providing an interposer (1) with an integrated circuit (25), arranging a dielectric layer (2) with metal layers embedded in the dielectric layer above a main surface (10) of the interposer, connecting the integrated circuit with at least one of the metal layers, forming an interconnection (7) through the interposer, the interconnection contacting one of the metal layers, arranging a further dielectric layer (3) above a further main surface (11) of the interposer opposite the main surface and arranging a further metal layer in or on the further dielectric layer, the further metal layer being connected with the interconnection, arranging a chip provided with at least one contact pad at the main surface or at the further main surface, and electrically conductively connecting the contact pad with the interconnection.
12
US10283541B2
Semiconductor device comprising an aperture array and method of producing such a semiconductor device
Publication/Patent Number: US10283541B2 Publication Date: 2019-05-07 Application Number: 15/528,089 Filing Date: 2015-11-09 Inventor: Siegert, Joerg   Schrank, Franz   Schrems martin   Assignee: ams AG   IPC: H01L27/146 Abstract: A photosensor (2) is arranged in a semiconductor substrate (1) at a main surface (10), a dielectric layer (4) is arranged on or above the main surface, the dielectric layer including a metal layer (6) electrically connected with the photosensor, and an aperture layer (16) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones (18) above the photosensor, each of the aperture zones penetrating the aperture layer.
13
US2019378801A1
RF Functionality and Electromagnetic Radiation Shielding in a Component Carrier
Publication/Patent Number: US2019378801A1 Publication Date: 2019-12-12 Application Number: 16/001,831 Filing Date: 2018-06-06 Inventor: Leitgeb, Markus   Schrems martin   Schlaffer, Erich   Anderson, Steve   Assignee: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft   IPC: H01L23/552 Abstract: A component carrier including i) an electronic component embedded in the component carrier, ii) an antenna structure arranged at a region of a first main surface of the component carrier, iii) a shielding structure made of an electrically conductive material and configured for shielding electromagnetic radiation from propagating between the antenna structure and the electronic component. Hereby, the shielding structure is arranged at least partially between the antenna structure and the electronic component. Furthermore, the component carrier includes an electrically conductive structure to electrically connect the electronic component and the antenna structure through the shielding structure. The shielding structure is non-perforated at least in a plane between the antenna structure and the electronic component.
14
EP2881753B1
Optical sensor arrangement and method of producing an optical sensor arrangement
Publication/Patent Number: EP2881753B1 Publication Date: 2019-03-06 Application Number: 13199086.3 Filing Date: 2013-12-20 Inventor: Schrank, Franz   Dierschke, Eugene G.   Schrems martin   Assignee: ams AG   IPC: G01S7/481
15
US10256147B2
Dicing method
Publication/Patent Number: US10256147B2 Publication Date: 2019-04-09 Application Number: 15/118,836 Filing Date: 2015-02-09 Inventor: Schrems martin   Stering, Bernhard   Schrank, Franz   Assignee: ams AG   IPC: H01L21/78 Abstract: The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated components (3) of chips (13) are arranged, and a rear surface (11) opposite the main surface, fastening a first handling wafer above the main surface, thinning the substrate at the rear surface, and forming trenches (20) penetrating the substrate and separating the chips by a single etching step after the substrate has been thinned.
16
EP3579334A1
RF FUNCTIONALITY AND ELECTROMAGNETIC RADIATION SHIELDING IN A COMPONENT CARRIER
Publication/Patent Number: EP3579334A1 Publication Date: 2019-12-11 Application Number: 19177885.1 Filing Date: 2019-06-03 Inventor: Leitgeb, Markus   Schrems martin   Schlaffer, Erich   Anderson, Steve   Assignee: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft   IPC: H01Q1/22 Abstract: A component carrier (100) comprising i) an electronic component (110) embedded in the component carrier (100), ii) an antenna structure (120) arranged at a region of a first main surface (102) of the component carrier (100), iii) a shielding structure (130) made of an electrically conductive material and configured for shielding electromagnetic radiation from propagating between the antenna structure (120) and the electronic component (110). Hereby, the shielding structure (130) is arranged at least partially between the antenna structure (120) and the electronic component (110). Furthermore, the component carrier (100) comprises an electrically conductive structure (150) to electrically connect the electronic component (110) and the antenna structure (120) through the shielding structure (130). The shielding structure (130) is non-perforated at least in a plane (P) between the antenna structure (120) and the electronic component (110).
17
EP2881983B1
Interposer-chip-arrangement for dense packaging of chips
Publication/Patent Number: EP2881983B1 Publication Date: 2019-09-18 Application Number: 13198854.5 Filing Date: 2013-12-20 Inventor: Kraft, Jochen   Schrank, Franz   Schrems martin   Assignee: ams AG   IPC: H01L21/60
18
US2019237500A1
3D-INTEGRATED OPTICAL SENSOR AND METHOD OF PRODUCING A 3D-INTEGRATED OPTICAL SENSOR
Publication/Patent Number: US2019237500A1 Publication Date: 2019-08-01 Application Number: 16/312,145 Filing Date: 2017-06-02 Inventor: Manninger, Mario   Bodner, Thomas   Toschkoff, Gregor   Schrems martin   Enichlmair, Hubert   Assignee: ams AG   IPC: H01L27/146 Abstract: A 3D-Integrated optical sensor comprises a semiconductor substrate, an integrated circuit, a wiring, a filter layer, a transparent spacer layer, and an on-chip diffuser. The semiconductor substrate has a main surface. The integrated circuit comprises at least one light sensitive area and is arranged in the substrate at or near the main surface. The wiring provides an electrical connection to the integrated circuit and is connected to the integrated circuit. The wiring is arranged on or in the semiconductor substrate. The filter layer has a direction dependent transmission characteristic and is arranged on the integrated circuit. In fact, the filter layer at least covers the light sensitive area. The transparent spacer layer is arranged on the main surface and, at least partly, encloses the filter layer. A spacer thickness is arranged to limit a spectral shift of the filter layer. The on-chip diffuser is arranged on the transparent spacer layer.
19
EP3483921A1
EMBEDDING KNOWN-GOOD COMPONENT IN KNOWN-GOOD CAVITY OF KNOWN-GOOD COMPONENT CARRIER MATERIAL WITH PRE-FORMED ELECTRIC CONNECTION STRUCTURE
Publication/Patent Number: EP3483921A1 Publication Date: 2019-05-15 Application Number: 17201225.4 Filing Date: 2017-11-11 Inventor: Gavagnin, Marco   Leitgeb, Markus   Schrems martin   Winkler, Roland   Anderson, Steve   Assignee: AT & S Austria Technologie & Systemtechnik Aktiengesellschaft   IPC: H01L21/66 Abstract: A method of manufacturing a component carrier (100), wherein the method comprises providing a known-good layer stack (102) comprising an already formed electrically conductive connection structure (104) and a known-good cavity (106), and mounting a known-good component (108) on the already formed electrically conductive connection structure (104) in the cavity (106).
20
US2019148304A1
Embedding Known-Good Component in Known-Good Cavity of Known-Good Component Carrier Material With Pre-formed Electric Connection Structure
Publication/Patent Number: US2019148304A1 Publication Date: 2019-05-16 Application Number: 16/185,283 Filing Date: 2018-11-09 Inventor: Gavagnin, Marco   Leitgeb, Markus   Schrems martin   Winkler, Roland   Anderson, Steve   Assignee: AT&S Austria Technologie & Systemtechnik Aktiengesellschaft   IPC: H01L23/538 Abstract: A method of manufacturing a component carrier includes providing a known-good layer stack comprising an already formed electrically conductive connection structure and a known-good cavity, and mounting a known-good component on the already formed electrically conductive connection structure in the cavity.