Country
Full text data for US,EP,CN
Type
Legal Validity
Legal Status
Filing Date
Publication Date
Inventor
Assignee
Click to expand
IPC(Section)
IPC(Class)
IPC(Subclass)
IPC(Group)
IPC(Subgroup)
Agent
Agency
Claims Number
Figures Number
Citation Number of Times
Assignee Number
No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
Application Number Application Number Filing Date Filing Date
Inventor Inventor Assignee Assignee IPC IPC
201
KR20030001070A
METHOD FOR MANUFACTURING FERROELECTRIC MEMORY DEVICE
Publication/Patent Number: KR20030001070A Publication Date: 2003-01-06 Application Number: 20010037400 Filing Date: 2001-06-28 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/105 Abstract: PURPOSE: A fabrication method of a ferroelectric memory device is provided to simplify manufacturing processes by simultaneously forming a bit line plug and a capacitor plug
202
KR100358176B1
METHOD FOR FORMING UPPER ELECTRODE OF CAPACITORS
Publication/Patent Number: KR100358176B1 Publication Date: 2003-02-19 Application Number: 19980045317 Filing Date: 1998-10-28 Inventor: Seo, Chung Won   Assignee: HYUNDAI ELECTRONICS IND. CO., LTD.   IPC: H01L27/108 Abstract: PURPOSE: A method for forming an upper electrode is provided to reduce a leakage current and improve an interface property between a dielectric layer and the upper electrode by using sputtering in oxygen atmosphere. CONSTITUTION: A method comprises the steps of forming a first metal layer(22) on a dielectric layer(21) of capacitor by firstly sputtering method
203
KR20030084347A
Method for fabricating embedded Ferroelectric memory device with hydrogen diffusion barrier
Publication/Patent Number: KR20030084347A Publication Date: 2003-11-01 Application Number: 20020023019 Filing Date: 2002-04-26 Inventor: Kang, Eung Yeol   Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/105 Abstract: PURPOSE: A method for fabricating an embedded ferroelectric memory device including a hydrogen diffusion barrier layer is provided to increase a hydrogen annealing effect and protect a ferroelectric by eliminating an Al2O3 hydrogen diffusion barrier layer formed in a region except a memory cell block without an additional process. CONSTITUTION: A lower electrode(33) is formed over a cell region of a semiconductor substrate(30) in which the cell region and a peripheral circuit region are defined. A ferroelectric layer(35) is formed on the semiconductor substrate including the lower electrode. An upper electrode(36) is formed on the ferroelectric layer over the cell region. A hydrogen diffusion barrier layer(37) is formed on the semiconductor substrate including the upper electrode. The hydrogen diffusion barrier layer and the ferroelectric layer over the peripheral circuit region are simultaneously eliminated.
204
KR20030023844A
FERROELECTRIC RANDOM ACCESS MEMORY AND FABRICATION METHOD THEREOF
Publication/Patent Number: KR20030023844A Publication Date: 2003-03-20 Application Number: 20010088713 Filing Date: 2001-12-31 Inventor: Seo, Chung Won   Sung, Jin Yong   Oh, Sang Hyeon   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/105 Abstract: PURPOSE: A ferroelectric random access memory and fabrication method thereof are provided to prevent decrease of the capacitance caused by the size limit of an upper electrode and a short circuit between an upper and lower electrode. CONSTITUTION: Two neighboring transistors are formed on a semiconductor substrate(31). The first isolation layer(35) and second one(42) with openings to expose a portion of the first one are formed on the substrate. Two lower electrodes(41) are filled inside the openings. Two upper electrodes(44) are formed on a ferroelectric layer(43) with the same width as the lower ones. A portion of the upper electrodes is exposed to be connected to a plate line(47) through the third isolation layer(45). A word line(32)
205
KR20020044681A
METHOD FOR MANUFACTURING FERROELECTRIC MEMORY DEVICE
Publication/Patent Number: KR20020044681A Publication Date: 2002-06-19 Application Number: 20000073683 Filing Date: 2000-12-06 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/105 Abstract: PURPOSE: A fabrication method of a ferroelectric memory device is provided to improve a stability by preventing a bad burial of a metal by forming a contact hole having a wide width. CONSTITUTION: After forming a second interlayer dielectric(40) on a capacitor structure
206
KR100349687B1
FERROELECTRIC CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
Publication/Patent Number: KR100349687B1 Publication Date: 2002-08-22 Application Number: 19990063805 Filing Date: 1999-12-28 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/105 Abstract: PURPOSE: A ferroelectric capacitor and a method for manufacturing the same are to reduce a surface area of a capacitor by vertically layering two capacitors in parallel. CONSTITUTION: The first interlayer dielectric(36) is formed on a substrate(30)
207
KR20020009169A
SEMICONDUCTOR MEMORY DEVICE WITH VERTICALLY STACKED CAPACITORS OF SEVERAL CELLS
Publication/Patent Number: KR20020009169A Publication Date: 2002-02-01 Application Number: 20000042637 Filing Date: 2000-07-25 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/10 Abstract: PURPOSE: A semiconductor memory device is provided to reduce a size of semiconductor memory device by laminating vertically capacitors of multiple cells. CONSTITUTION: The first interlayer dielectric(35) is formed on a semiconductor substrate(30). Two stacked capacitors including the first electrode(36)
208
KR100333661B1
METHOD FOR FORMING ELECTRODE OF FERROELECTRIC CAPACITOR
Publication/Patent Number: KR100333661B1 Publication Date: 2002-04-24 Application Number: 19990025791 Filing Date: 1999-06-30 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/10 Abstract: PURPOSE: A method for forming an electrode of a ferroelectric capacitor is provided to restrain effectively that a hillock is generated on an electrode in a high-temperature furnace annealing by forming a ferroelectric capacitor electrode by a sputtering method under an oxygen environment by using Pt-Nd alloy target. CONSTITUTION: In a method for forming a ferroelectric capacitor
209
KR20020046780A
METHOD FOR MANUFACTURING CAPACITOR OF FERROELECTRIC MEMORY DEVICE
Publication/Patent Number: KR20020046780A Publication Date: 2002-06-21 Application Number: 20000077111 Filing Date: 2000-12-15 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/105 Abstract: PURPOSE: A fabrication method of capacitors is provided to simplify manufacturing processes by forming the capacitors using two-step etching. CONSTITUTION: A lower electrode(22) is formed on an insulating substrate(21) by depositing and patterning a first Pt film. A ferroelectric film(23) and a second Pt film are sequentially deposited on the resultant structure. An upper electrode(24) is formed by simultaneously etching the second Pt film and the ferroelectric film(23). An SBT(SrxBiyTa2O9) or a PZT(Pb(Zr
210
KR20020010818A
FERROELECTRIC MEMORY DEVICE HAVING A PLURALITY OF FERROELECTRIC CAPACITORS OF DIFFERENT CHARACTERISTICS WITHIN ONE UNIT CELL
Publication/Patent Number: KR20020010818A Publication Date: 2002-02-06 Application Number: 20000044309 Filing Date: 2000-07-31 Inventor: Seo, Chung Won   Jung, Jung Hui   Assignee: Hynix Semiconductor Inc.   IPC: G11C11/22 Abstract: PURPOSE: A ferroelectric memory device having a plurality of ferroelectric capacitors of different characteristics within one unit cell is provided to be capable of obtaining a stable operation of a device even in low voltage. CONSTITUTION: Two laminated capacitors consist of a first interlayer insulating film(13) covers a semiconductor substrate(10)
211
KR20010061312A
FERROELECTRIC CAPACITOR AND METHOD FOR MANUFACTURING THE SAME
Publication/Patent Number: KR20010061312A Publication Date: 2001-07-07 Application Number: 19990063805 Filing Date: 1999-12-28 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/105 Abstract: PURPOSE: A ferroelectric capacitor and a method for manufacturing the same are to reduce a surface area of a capacitor by vertically layering two capacitors in parallel. CONSTITUTION: The first interlayer dielectric(36) is formed on a substrate(30)
212
KR20010005009A
METHOD FOR FORMING ELECTRODE OF FERROELECTRIC CAPACITOR
Publication/Patent Number: KR20010005009A Publication Date: 2001-01-15 Application Number: 19990025791 Filing Date: 1999-06-30 Inventor: Seo, Chung Won   Assignee: Hynix Semiconductor Inc.   IPC: H01L27/10 Abstract: PURPOSE: A method for forming an electrode of a ferroelectric capacitor is provided to restrain effectively that a hillock is generated on an electrode in a high-temperature furnace annealing by forming a ferroelectric capacitor electrode by a sputtering method under an oxygen environment by using Pt-Nd alloy target. CONSTITUTION: In a method for forming a ferroelectric capacitor
213
KR20000027401A
METHOD FOR FORMING UPPER ELECTRODE OF CAPACITORS
Publication/Patent Number: KR20000027401A Publication Date: 2000-05-15 Application Number: 19980045317 Filing Date: 1998-10-28 Inventor: Seo, Chung Won   Assignee: HYUNDAI ELECTRONICS IND. CO., LTD.   IPC: H01L27/108 Abstract: PURPOSE: A method for forming an upper electrode is provided to reduce a leakage current and improve an interface property between a dielectric layer and the upper electrode by using sputtering in oxygen atmosphere. CONSTITUTION: A method comprises the steps of forming a first metal layer(22) on a dielectric layer(21) of capacitor by firstly sputtering method
214
KR20000042389A
FERROELECTRIC CAPACITOR OF SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Publication/Patent Number: KR20000042389A Publication Date: 2000-07-15 Application Number: 19980058554 Filing Date: 1998-12-24 Inventor: Seo, Chung Won   Assignee: HYUNDAI ELECTRONICS IND. CO., LTD.   IPC: H01L21/02 Abstract: PURPOSE: A ferroelectric capacitor of a semiconductor device and a method for manufacturing the same are to soften a surface roughness of a SBT((Sr
Total 11 pages