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1 | EP2713409B1 |
PHOTODIODE WITH A FIELD ELECTRODE FOR REDUCING THE SPACE CHARGE REGION
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Publication/Patent Number: EP2713409B1 | Publication Date: 2020-08-26 | Application Number: 12186405.2 | Filing Date: 2012-09-27 | Inventor： Teva, Jordi | Assignee: ams AG | IPC: H01L31/103 | ||||
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2 | EP2747154B1 |
LATERAL SINGLE-PHOTON AVALANCHE DIODE AND METHOD OF PRODUCING A LATERAL SINGLE-PHOTON AVALANCHE DIODE
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Publication/Patent Number: EP2747154B1 | Publication Date: 2020-04-01 | Application Number: 12199105.3 | Filing Date: 2012-12-21 | Inventor： Teva, Jordi Roger, Frederic | Assignee: ams AG | IPC: H01L31/107 | ||||
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3 | EP2592661B8 |
Lateral avalanche photodiode device and method of production
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Publication/Patent Number: EP2592661B8 | Publication Date: 2019-05-22 | Application Number: 11188873.1 | Filing Date: 2011-11-11 | Inventor： Jonak-auer, Ingrid Teva, Jordi | Assignee: ams AG | IPC: H01L31/107 | ||||
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4 | US10522696B2 |
Lateral single-photon avalanche diode and method of producing a lateral single-photon avalanche diode
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Publication/Patent Number: US10522696B2 | Publication Date: 2019-12-31 | Application Number: 16/157,424 | Filing Date: 2018-10-11 | Inventor： Teva, Jordi Roger, Frederic | Assignee: ams AG | IPC: H01L31/0224 | Abstract: A semiconductor body of a first type of conductivity is formed including a base layer, a first further layer on the base layer and a second further layer on the first further layer. The base layer and the second further layer have an intrinsic doping or a doping concentration that is lower than the doping concentration of the first further layer. A doped region of an opposite second type of conductivity is arranged in the semiconductor body, penetrates the first further layer and extends into the base layer and into the second further layer. Anode and cathode terminals are electrically connected to the first further layer and the doped region, respectively. The doped region can be produced by filling a trench with doped polysilicon. | |||
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5 | US2019051772A1 |
LATERAL SINGLE-PHOTON AVALANCHE DIODE AND METHOD OF PRODUCING A LATERAL SINGLE-PHOTON AVALANCHE DIODE
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Publication/Patent Number: US2019051772A1 | Publication Date: 2019-02-14 | Application Number: 16/157,424 | Filing Date: 2018-10-11 | Inventor： Teva, Jordi Roger, Frederic | Assignee: ams AG | IPC: H01L31/0224 | Abstract: A semiconductor body of a first type of conductivity is formed including a base layer, a first further layer on the base layer and a second further layer on the first further layer. The base layer and the second further layer have an intrinsic doping or a doping concentration that is lower than the doping concentration of the first further layer. A doped region of an opposite second type of conductivity is arranged in the semiconductor body, penetrates the first further layer and extends into the base layer and into the second further layer. Anode and cathode terminals are electrically connected to the first further layer and the doped region, respectively. The doped region can be produced by filling a trench with doped polysilicon. | |||
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6 | EP2592661B1 |
Lateral avalanche photodiode device and method of production
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Publication/Patent Number: EP2592661B1 | Publication Date: 2019-03-20 | Application Number: 11188873.1 | Filing Date: 2011-11-11 | Inventor： Jonak-auer, Ingrid Teva, Jordi | Assignee: austriamicrosystems AG | IPC: H01L31/107 | Abstract: A lateral avalanche device comprises a semiconductor substrate (1) having a trench (4) with side walls (5) extending from a main surface (2) to a rear surface (3). A first doped region (11) is present at the side walls of the trench, and a second doped region (12) is arranged at a distance from the first doped region. A third doped region (13) is located adjacent to the first doped region, extends through the substrate from the main surface to the rear surface, and is arranged between the first doped region and the second doped region. The third doped region (13) is the avalanche multiplication region of the photodiode structure. The second doped region and the third doped region have a first type of conductivity, and the first doped region has a second type of conductivity which is opposite to the first type of conductivity. The region of the substrate that is between the first doped region and the second doped region is of the first type of conductivity. | |||
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7 | EP2860560B1 |
Semiconductor device with optical and electrical vias
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Publication/Patent Number: EP2860560B1 | Publication Date: 2019-07-24 | Application Number: 13188483.5 | Filing Date: 2013-10-14 | Inventor： Kraft, Jochen Rohracher, Karl Teva, Jordi | Assignee: ams AG | IPC: G02B6/42 | ||||
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8 | EP2620978B1 |
Semiconductor device with internal substrate contact and method of production
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Publication/Patent Number: EP2620978B1 | Publication Date: 2019-07-24 | Application Number: 12152485.4 | Filing Date: 2012-01-25 | Inventor： Kraft, Jochen Teva, Jordi Cassidy, Cathal Koppitsch, Günther | Assignee: austriamicrosystems AG | IPC: H01L21/74 | ||||
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9 | US10374114B2 |
Lateral single-photon avalanche diode and method of producing a lateral single-photon avalanche diode
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Publication/Patent Number: US10374114B2 | Publication Date: 2019-08-06 | Application Number: 14/777,484 | Filing Date: 2014-03-11 | Inventor： Teva, Jordi Roger, Frederic Stueckler, Ewald Jessenig, Stefan Minixhofer, Rainer Wachmann, Ewald Schrems, Martin Koppitsch, Guenther | Assignee: ams AG | IPC: H01L31/107 | Abstract: The lateral single-photon avalanche diode comprises a semiconductor body comprising a semiconductor material of a first type of electric conductivity, a trench in the semiconductor body, and anode and cathode terminals. A junction region of the first type of electric conductivity is located near the sidewall of the trench, and the electric conductivity is higher in the junction region than at a farther distance from the sidewall. A semiconductor layer of an opposite second type of electric conductivity is arranged at the sidewall of the trench adjacent to the junction region. The anode and cathode terminals are electrically connected with the semiconductor layer and with the junction region, respectively. The junction region may be formed by a sidewall implantation. | |||
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10 | US10128385B2 |
Lateral single-photon avalanche diode and method of producing a lateral single photon avalanche diode
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Publication/Patent Number: US10128385B2 | Publication Date: 2018-11-13 | Application Number: 14/654,470 | Filing Date: 2013-12-19 | Inventor： Teva, Jordi Roger, Frederic | Assignee: ams AG | IPC: H01L31/107 | Abstract: A semiconductor body of a first type of conductivity is formed including a base layer, a first further layer on the base layer and a second further layer on the first further layer. The base layer and the second further layer have an intrinsic doping or a doping concentration that is lower than the doping concentration of the first further layer. A doped region of an opposite second type of conductivity is arranged in the semiconductor body, penetrates the first further layer and extends into the base layer and into the second further layer. Anode and cathode terminals are electrically connected to the first further layer and the doped region, respectively. The doped region can be produced by filling a trench with doped polysilicon. | |||
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11 | US9995894B2 |
Semiconductor device with optical and electrical vias
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Publication/Patent Number: US9995894B2 | Publication Date: 2018-06-12 | Application Number: 15/028,934 | Filing Date: 2014-10-08 | Inventor： Teva, Jordi Rohracher, Karl Kraft, Jochen | Assignee: ams AG | IPC: H05K3/46 | Abstract: The method comprises providing a semiconductor substrate, which has a main surface and an opposite further main surface, arranging a contact pad above the further main surface, forming a through-substrate via from the main surface to the further main surface at a distance from the contact pad and, by the same method step together with the through-substrate via, forming a further through-substrate via above the contact pad, arranging a hollow metal via layer in the through-substrate via and, by the same method step together with the metal via layer, arranging a further metal via layer in the further through-substrate via, the further metal via layer contacting the contact pad, and removing a bottom portion of the metal via layer to form an optical via laterally surrounded by the metal via layer. | |||
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12 | US9870988B2 |
Method of producing a semiconductor device with through-substrate via covered by a solder ball
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Publication/Patent Number: US9870988B2 | Publication Date: 2018-01-16 | Application Number: 15/691,654 | Filing Date: 2017-08-30 | Inventor： Schrems, Martin Schrank, Franz Teva, Jordi | Assignee: ams AG | IPC: H01L23/552 | Abstract: A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side. A solder ball is placed above the opening and a reflow of the solder ball is effected, thereby forming a void of the through-substrate via, the void being covered by the solder ball. | |||
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13 | DE102011009373B4 |
Fotodiodenbauelement
Title (English):
Photoelectric component
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Publication/Patent Number: DE102011009373B4 | Publication Date: 2017-08-03 | Application Number: 102011009373 | Filing Date: 2011-01-25 | Inventor： Schrank, Franz Teva, Jordi Dr | Assignee: Austriamicrosystems AG | IPC: H01L27/146 | Abstract: Fotodiodenbauelement mit – einer elektrisch leitfähigen Kathodenschicht (3) an einer Fotodiodenschicht (4) aus einem Halbleitermaterial | |||
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14 | US9252298B2 |
Photodiode device with reducible space charge region
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Publication/Patent Number: US9252298B2 | Publication Date: 2016-02-02 | Application Number: 14/430,534 | Filing Date: 2013-09-10 | Inventor： Teva, Jordi | Assignee: ams AG | IPC: H01L21/20 | Abstract: The photodiode device comprises a doped region (2) contiguous with a contact region (3) of the same conductivity type located at the substrate surface (1′), an appertaining anode or cathode connection (7, 11), a further contact region (5) of an opposite conductivity type at the substrate surface, and a further anode or cathode connection (8, 12). The contact region (3) is arranged at least on opposite sides of an active area of the substrate surface that covers the further contact region (5). A lateral pn junction (16) and an associated space charge region is formed at the substrate surface by a boundary of one of the contact regions, the boundary facing the other contact region. A field electrode (6) is arranged above the lateral pn junction, separated from the lateral pn junction by a dielectric material (10), and is provided with a further electrical connection (9, 13) separate from the anode and cathode connections. By the field electrode (6), the space charge region at the surface (1′) is reduced and the peripheral dark current of the photodiode decreases considerably. | |||
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15 | US9293626B2 |
Lateral avalanche photodiode device and method of production
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Publication/Patent Number: US9293626B2 | Publication Date: 2016-03-22 | Application Number: 14/357,199 | Filing Date: 2012-10-22 | Inventor： Jonak-auer, Ingrid Teva, Jordi | Assignee: AMS AG | IPC: H01L31/107 | Abstract: A lateral avalanche photodiode device comprises a semiconductor substrate (1) having a trench (4) with side walls (5) extending from a main surface (2) to a rear surface (3). A first doped region (11) is present at the side walls of the trench, and a second doped region (12) is arranged at a distance from the first doped region. A third doped region (13) is located adjacent to the first doped region, extends through the substrate from the main surface to the rear surface, and is arranged between the first doped region and the second doped region. The third doped region (13) is the avalanche multiplication region of the photodiode structure. The second doped region and the third doped region have a first type of conductivity, and the first doped region has a second type of conductivity which is opposite to the first type of conductivity. The region of the substrate that is between the first doped region and the second doped region is of the first type of conductivity. | |||
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16 | US2016259139A1 |
SEMICONDUCTOR DEVICE WITH OPTICAL AND ELECTRICAL VIAS
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Publication/Patent Number: US2016259139A1 | Publication Date: 2016-09-08 | Application Number: 15/028,934 | Filing Date: 2014-10-08 | Inventor： Kraft, Jochen Rohracher, Karl Teva, Jordi | Assignee: ams AG | IPC: G02B6/42 | Abstract: The method comprises providing a semiconductor substrate, which has a main surface and an opposite further main surface, arranging a contact pad above the further main surface, forming a through-substrate via from the main surface to the further main surface at a distance from the contact pad and, by the same method step together with the through-substrate via, forming a further through-substrate via above the contact pad, arranging a hollow metal via layer in the through-substrate via and, by the same method step together with the metal via layer, arranging a further metal via layer in the further through-substrate via, the further metal via layer contacting the contact pad, and removing a bottom portion of the metal via layer to form an optical via laterally surrounded by the metal via layer. | |||
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17 | US9466529B2 |
Masking method for semiconductor devices with high surface topography
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Publication/Patent Number: US9466529B2 | Publication Date: 2016-10-11 | Application Number: 14/766,412 | Filing Date: 2014-01-29 | Inventor： Koppitsch, Guenther Stueckler, Ewald Rohracher, Karl Teva, Jordi | Assignee: AMS AG | IPC: H01L21/76 | Abstract: The method comprises the steps of providing a semiconductor body or substrate (1) with a recess or trench (2) in a main surface (10), applying a mask (3) on the main surface, the mask covering the recess or trench, so that the walls and bottom of the recess or trench and the mask together enclose a cavity (4), which is filled with a gas, and forming at least one opening (5) in the mask at a distance from the recess or trench, the distance (6) being adapted to allow the gas to escape from the cavity via the opening when the gas pressure exceeds an external pressure. | |||
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18 | US9245843B2 |
Semiconductor device with internal substrate contact and method of production
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Publication/Patent Number: US9245843B2 | Publication Date: 2016-01-26 | Application Number: 14/373,627 | Filing Date: 2013-01-16 | Inventor： Kraft, Jochen Teva, Jordi Cassidy, Cathal Koppitsch, Günther | Assignee: ams AG | IPC: H01L23/528 | Abstract: The semiconductor device comprises a substrate (1) of semiconductor material, a contact hole (2) reaching from a surface (10) into the substrate, and a contact metallization (12) arranged in the contact hole, so that the contact metallization forms an internal substrate contact (4) on the semiconductor material at least in a bottom area (40) of the contact hole. | |||
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19 | EP2765456B1 |
Masking method for semiconductor devices with high surface topography
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Publication/Patent Number: EP2765456B1 | Publication Date: 2016-05-04 | Application Number: 13154625.1 | Filing Date: 2013-02-08 | Inventor： Koppitsch, Günther Stückler, Ewald Rohracher, Karl Teva, Jordi | Assignee: ams AG | IPC: G03F7/09 | Abstract: The method comprises the steps of providing a semiconductor body or substrate (1) with a recess or trench (2) in a main surface (10), applying a mask (3) on the main surface, the mask covering the recess or trench, so that the walls and bottom of the recess or trench and the mask together enclose a cavity (4), which is filled with a gas, and forming at least one opening (5) in the mask at a distance from the recess or trench, the distance (6) being adapted to allow the gas to escape from the cavity via the opening when the gas pressure exceeds an external pressure. | |||
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20 | EP2973746A2 |
LATERAL SINGLE-PHOTON AVALANCHE DIODE AND THEIR MANUFACTURING METHOD
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Publication/Patent Number: EP2973746A2 | Publication Date: 2016-01-20 | Application Number: 14709629.1 | Filing Date: 2014-03-11 | Inventor： Teva, Jordi Roger, Frederic StÜckler, Ewald Jessenig, Stefan Minixhofer, Rainer Wachmann, Ewald Schrems, Martin Koppitsch, Günther | Assignee: AMS AG | IPC: H01L31/107 |
3.Current Quota