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No. Publication Number Title Publication/Patent Number Publication/Patent Number Publication Date Publication Date
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41 US2014084136A1
OPTICAL RECOGNITION SYSTEM AND METHOD THEREOF
Publication/Patent Number: US2014084136A1 Publication Date: 2014-03-27 Application Number: 13/628,667 Filing Date: 2012-09-27 Inventor: Hsieh, Chih-cheng   Yeh shang fu   Liu, Chun-kai   Cheng, Chiao-jen   Assignee: NATIONAL TSING HUA UNIVERSITY   IPC: H01L27/146 Abstract: The present invention is related to an optical recognition system and a method thereof, and more particularly to an optical recognition system and a method that adopts a single-slope analog-to-digital converter to proceed a single-slope analog-to-digital conversion in order to have an image with a wide dynamic range.
42 JP2014179989A
SENSOR SYSTEM AND METHOD OF CREATING DATA OUT SIGNAL FOR USE IN SENSOR
Publication/Patent Number: JP2014179989A Publication Date: 2014-09-25 Application Number: 2014049956 Filing Date: 2014-03-13 Inventor: Chou, Kuo-yu   Chao, Yi-ping   Yeh shang fu   Tao, Erik   Assignee: TAIWAN SEMICONDUCTOR MANUFACTUARING CO LTD   IPC: H04N1/028 Abstract: PROBLEM TO BE SOLVED: To provide a system and a method for reducing the transient current of a sensor.SOLUTION: A sensor system 100 includes a pixel array 104
43 US2014266831A1
LOW GLITCH CURRENT DIGITAL-TO-ANALOG CONVERTER
Publication/Patent Number: US2014266831A1 Publication Date: 2014-09-18 Application Number: 13/858,445 Filing Date: 2013-04-08 Inventor: Chou, Kuo-yu   Tao, Wei Lun   Yeh shang fu   Chen, Yi-che   Chao, Calvin Yi-ping   Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.   IPC: H03M1/72 Abstract: The present disclosure relates to a method and architecture to minimize a transient glitch within a current digital-to-analog converter (DAC) comprising an array of identical current unit cells. The current DAC is configured with individual column decoders for even and odd rows of current unit cells, thus allowing for independent control of adjacent rows. The even row and odd row column decoders further comprise thermal decoders with coupled timing encoding which establishes synergy between an adjacent pair of rows. As current units cells within an active row are activated across the row by a counting up of a first column decoder, the current units cells within a next row adjacent the active row are returned to an initial state of the active row by counting down in a second column decoder. Other devices and methods are also disclosed.
44 US8890742B2
Column analog-to-digital converter for CMOS sensor
Publication/Patent Number: US8890742B2 Publication Date: 2014-11-18 Application Number: 13/792,262 Filing Date: 2013-03-11 Inventor: Chou, Kuo-yu   Yeh shang fu   Tao, Erik   Chao, Calvin Yi-ping   Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.   IPC: H03M1/56 Abstract: A system and method is disclosed for an imaging device and/or an analog to digital converter which converts an analog input signal to a digital data signal using a comparator which compares the analog input signal to a first ramped reference signal to determine an operating point and then uses the same comparator to compare the analog input signal to a second ramped reference signal multiple times about the determined operating point.
45 US2014266991A1
Systems and Methods to Mitigate Transient Current for Sensors
Publication/Patent Number: US2014266991A1 Publication Date: 2014-09-18 Application Number: 13/893,468 Filing Date: 2013-05-14 Inventor: Chou, Kuo-yu   Tao, Erik   Yeh shang fu   Chao, Calvin Yi-ping   Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.   IPC: G09G3/36 Abstract: A sensor system includes a pixel array, column units and a compensation circuit. The pixel array is configured to provide pixel column data. The column units are configured to generate an offset data out signal from the pixel column data. The offset data out signal includes digital offsets. The compensation circuit is configured to remove the digital offsets from the offset data out signal. The compensation circuit is also configured to generate a data out signal.
46 US8872686B2
Low glitch current digital-to-analog converter
Publication/Patent Number: US8872686B2 Publication Date: 2014-10-28 Application Number: 13/858,445 Filing Date: 2013-04-08 Inventor: Chou, Kuo-yu   Tao, Wei Lun   Yeh shang fu   Chen, Yi-che   Chao, Calvin Yi-ping   Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.   IPC: H03M1/66 Abstract: The present disclosure relates to a method and architecture to minimize a transient glitch within a current digital-to-analog converter (DAC) comprising an array of identical current unit cells. The current DAC is configured with individual column decoders for even and odd rows of current unit cells, thus allowing for independent control of adjacent rows. The even row and odd row column decoders further comprise thermal decoders with coupled timing encoding which establishes synergy between an adjacent pair of rows. As current units cells within an active row are activated across the row by a counting up of a first column decoder, the current units cells within a next row adjacent the active row are returned to an initial state of the active row by counting down in a second column decoder. Other devices and methods are also disclosed.
47 US2014252202A1
COLUMN ANALOG-TO-DIGITAL CONVERTER FOR CMOS SENSOR
Publication/Patent Number: US2014252202A1 Publication Date: 2014-09-11 Application Number: 13/792,262 Filing Date: 2013-03-11 Inventor: Chou, Kuo-yu   Yeh shang fu   Tao, Erik   Chao, Calvin Yi-ping   Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.   IPC: H03M1/12 Abstract: A system and method is disclosed for an imaging device and/or an analog to digital converter which converts an analog input signal to a digital data signal using a comparator which compares the analog input signal to a first ramped reference signal to determine an operating point and then uses the same comparator to compare the analog input signal to a second ramped reference signal multiple times about the determined operating point.
48 US2013265066A1
PIXEL ARRAY MODULE WITH SELF-TEST FUNCTION AND METHOD THEREOF
Publication/Patent Number: US2013265066A1 Publication Date: 2013-10-10 Application Number: 13/539,486 Filing Date: 2012-07-01 Inventor: Hsieh, Chih-cheng   Yeh shang fu   Yeh, Ka-yi   Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   IPC: G01R31/3187 Abstract: A pixel array module with a self-test function including a test circuit unit, a plurality of test lines, and a pixel array is provided. The test circuit unit provides the self-test function. The test lines are connected between the test circuit unit and the pixel array. The pixel array is connected to the test circuit unit through the test lines and includes a plurality of pixels. Each pixel includes a transistor. Each transistor has a first terminal and a second terminal. Regarding each of the pixels, a driving signal of the transistor is transmitted from the first terminal to the second terminal thereof under a normal mode, and a test signal of the transistor is transmitted from the second terminal to the first terminal thereof under a test mode. Furthermore, a self-test method of the foregoing pixel array module is also provided.
49 TW201234852A
Image sensor and sensing method thereof
Publication/Patent Number: TW201234852A Publication Date: 2012-08-16 Application Number: 100104778 Filing Date: 2011-02-14 Inventor: Hsieh, Chih Cheng   Yeh shang fu   Yeh, Ka Yi   Assignee: Industrial Technology Research Institute   IPC: H04N5/374 Abstract: An image sensor including a pixel array is provided. The pixel array includes R x S sub-pixel arrays. The sub-pixel array includes P x Q pixels. Each pixel includes a photodiode
50 US2012205520A1
IMAGE SENSOR AND SENSING METHOD THEREOF
Publication/Patent Number: US2012205520A1 Publication Date: 2012-08-16 Application Number: 13/086,362 Filing Date: 2011-04-13 Inventor: Hsieh, Chih-cheng   Yeh shang fu   Yeh, Ka-yi   Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   IPC: H01L27/146 Abstract: An image sensor including a pixel array is provided. The pixel array includes R×S sub-pixel arrays. The sub-pixel array includes P×Q pixels. Each pixel includes a photodiode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The gate of the second transistor is coupled to a row control signal. The second source/drain electrode of the second transistor is coupled to a column control signal. The gate electrode of the third transistor is coupled to a reset signal. The second source/drain electrode of the third transistor is coupled to a column voltage reset signal. The gate electrode of the fifth transistor is coupled to a row select signal. The sub-pixel array uses the row control signal, the column control signal, the column voltage reset signal, and the row select signal to select an output the sensing signal of one of the pixels.