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1 | US2020321484A1 |
PN JUNCTION AND PREPARATION METHOD AND USE THEREOF
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Publication/Patent Number: US2020321484A1 | Publication Date: 2020-10-08 | Application Number: 16/837,189 | Filing Date: 2020-04-01 | Inventor: Gao, Liang Zhang, Zhun Lin, Yu-ting | Assignee: Sunflare (Nanjing) Energy Technology Ltd | IPC: H01L31/032 | Abstract: The patent application relates to a PN junction as well as the preparation method and use thereof. Said PN junction comprises a p-type CIGS semiconductor thin film layer and an n-type CIGS semiconductor thin film layer, wherein the n-type CIGS semiconductor thin film layer comprises or consists essentially of elements Cu, In, Ga and Se, where the Cu to In molar ratio is within the range of 1.1 to 1.5, and has a chemical formula of Cu(InxGa1-x)Se2, where x is within the range of 0.6 to 0.9. The patent application further relates to a semiconductor thin film element comprising said PN junction, in particular a photodiode element, and a photoelectric sensing module comprising said semiconductor thin film element as well as the various uses thereof. | |||
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2 | EP3719854A1 |
PN JUNCTION AND PREPARATION METHOD AND USE THEREOF
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Publication/Patent Number: EP3719854A1 | Publication Date: 2020-10-07 | Application Number: 20167490.0 | Filing Date: 2020-04-01 | Inventor: Gao, Liang Zhang, Zhun Lin, Yu-ting | Assignee: Sunflare (Nanjing) Energy Technology Ltd. | IPC: H01L31/032 | Abstract: The patent application relates to a PN junction as well as the preparation method and use thereof. Said PN junction comprises a p-type CIGS semiconductor thin film layer and an n-type CIGS semiconductor thin film layer, wherein the n-type CIGS semiconductor thin film layer comprises or consists essentially of elements Cu, In, Ga and Se, where the Cu to In molar ratio is within the range of 1.1 to 1.5, and has a chemical formula of Cu(InxGa1. x)Se2, where x is within the range of 0.6 to 0.9. The patent application further relates to a semiconductor thin film element comprising said PN junction, in particular a photodiode element, and a photoelectric sensing module comprising said semiconductor thin film element as well as the various uses thereof. | |||
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3 | US2019317125A1 |
MICROSCOPY SAMPLE STAGE FOR GAS HYDRATE TESTS AND TEMPERATURE AND PRESSURE CONTROLLING SYSTEM OF THE STAGE
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Publication/Patent Number: US2019317125A1 | Publication Date: 2019-10-17 | Application Number: 16/384,988 | Filing Date: 2019-04-16 | Inventor: Ning, Fulong Peng, Li Li, Wei Wang, Dongdong Zhang, Ling Ou, Wenjia Zhang, Zhun Zou, Zhong | Assignee: China University of Geosciences (Wuhan) | IPC: G01Q30/10 | Abstract: A microscopy sample stage includes a microscope carrier platform, a heating conductor mounting on the microscope carrier platform, and a pressure cover covering the sample groove for providing high pressure for the sample groove. The heating conductor includes a sample groove. The microscopy sample stage further includes a temperature sensor for detecting temperature of the sample groove, a heating resistance for heating the sample groove and a pipeline for transmitting refrigeration medium, the temperature sensor and the heating resistance are mounted on a bottom surface of the sample groove, and the pipeline is arranged inside the heat conductor surrounding the sample groove. | |||
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4 | EP2876696B1 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM SELENIDE FILM SOLAR CELL
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Publication/Patent Number: EP2876696B1 | Publication Date: 2018-11-28 | Application Number: 13820355.9 | Filing Date: 2013-04-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: C23C14/06 | Abstract: A method for fabricating a Cu-In-Ga-Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu-In-Ga-Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu-In-Ga-Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer on the In2Se3 or ZnS buffer layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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5 | EP2860768B1 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM DISELENIDE THIN-FILM SOLAR CELL
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Publication/Patent Number: EP2860768B1 | Publication Date: 2017-06-07 | Application Number: 13804992.9 | Filing Date: 2013-04-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: H01L31/18 | Abstract: A method for fabricating a Cu-In-Ga-Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu-In-Ga-Se absorbing layer on the molybdenum back electrode; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu-In-Ga-Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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6 | EP2860768A4 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM DISELENIDE THIN-FILM SOLAR CELL
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Publication/Patent Number: EP2860768A4 | Publication Date: 2016-02-17 | Application Number: 13804992 | Filing Date: 2013-04-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: C23C14/34 | Abstract: A method for fabricating a Cu-In-Ga-Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu-In-Ga-Se absorbing layer on the molybdenum back electrode; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu-In-Ga-Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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7 | EP2876696A1 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM SELENIDE FILM SOLAR CELL
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Publication/Patent Number: EP2876696A1 | Publication Date: 2015-05-27 | Application Number: 13820355.9 | Filing Date: 2013-04-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: H01L31/18 | Abstract: A method for fabricating a Cu-In-Ga-Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu-In-Ga-Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu-In-Ga-Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer on the In2Se3 or ZnS buffer layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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8 | US9105801B2 |
Method for fabricating Cu—In—Ga—Se film solar cell
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Publication/Patent Number: US9105801B2 | Publication Date: 2015-08-11 | Application Number: 14/153,028 | Filing Date: 2014-01-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: H01L31/18 | Abstract: A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu—In—Ga—Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer on the In2Se3 or ZnS buffer layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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9 | EP2876696A4 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM SELENIDE FILM SOLAR CELL
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Publication/Patent Number: EP2876696A4 | Publication Date: 2015-12-30 | Application Number: 13820355 | Filing Date: 2013-04-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: C23C14/06 | Abstract: A method for fabricating a Cu-In-Ga-Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu-In-Ga-Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In 2 Se 3 or ZnS buffer layer on the Cu-In-Ga-Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer on the In 2 Se 3 or ZnS buffer layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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10 | EP2860768A1 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM DISELENIDE THIN-FILM SOLAR CELL
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Publication/Patent Number: EP2860768A1 | Publication Date: 2015-04-15 | Application Number: 13804992.9 | Filing Date: 2013-04-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: H01L31/18 | Abstract: A method for fabricating a Cu-In-Ga-Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu-In-Ga-Se absorbing layer on the molybdenum back electrode; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu-In-Ga-Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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11 | US8969124B2 |
Method for fabricating Cu—In—Ga—Se film solar cell
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Publication/Patent Number: US8969124B2 | Publication Date: 2015-03-03 | Application Number: 14/153,026 | Filing Date: 2014-01-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: H01L21/00 | Abstract: A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the molybdenum back electrode; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu—In—Ga—Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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12 | US2015017755A1 |
Method for fabricating Cu-In-Ga-Se Film Solar Cell
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Publication/Patent Number: US2015017755A1 | Publication Date: 2015-01-15 | Application Number: 14/153,026 | Filing Date: 2014-01-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: H01L31/18 | Abstract: A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the molybdenum back electrode; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu—In—Ga—Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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13 | US2014193943A1 |
METHOD FOR FABRICATING Cu-In-Ga-Se FILM SOLAR CELL
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Publication/Patent Number: US2014193943A1 | Publication Date: 2014-07-10 | Application Number: 14/153,028 | Filing Date: 2014-01-11 | Inventor: Lin, Liuyu Zhang, Zhun | Assignee: Lin, Liuyu Zhang, Zhun | IPC: H01L31/18 | Abstract: A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu—In—Ga—Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer on the In2Se3 or ZnS buffer layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer. | |||
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14 | WO2014012383A1 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM SELENIDE FILM SOLAR CELL
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Publication/Patent Number: WO2014012383A1 | Publication Date: 2014-01-23 | Application Number: 2013074096 | Filing Date: 2013-04-11 | Inventor: Zhang, Zhun Lin, Liuyu | Assignee: ZHANG, ZHUN LIN, LIUYU | IPC: C23C14/34 | Abstract: The invention relates to a method for preparing a copper indium gallium selenide film solar cell. The method comprises: a) preparing a Mo back electrode on a substrate; b) preparing a copper indium gallium selenide absorbing layer on the Mo back electrode | |||
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15 | WO2013185506A1 |
METHOD FOR PREPARING COPPER INDIUM GALLIUM DISELENIDE THIN-FILM SOLAR CELL
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Publication/Patent Number: WO2013185506A1 | Publication Date: 2013-12-19 | Application Number: 2013074072 | Filing Date: 2013-04-11 | Inventor: Zhang, Zhun Lin, Liuyu | Assignee: ZHANG, ZHUN LIN, LIUYU | IPC: C23C14/35 | Abstract: The present invention relates to a method for preparing a copper indium gallium diselenide thin-film solar cell | |||
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16 | US7864521B2 |
Enclosure for electronic device
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Publication/Patent Number: US7864521B2 | Publication Date: 2011-01-04 | Application Number: 12/487,298 | Filing Date: 2009-06-18 | Inventor: Chen, Yun-lung Zhang zhun liang Luo, Pei-bin | Assignee: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd. Hon Hai Precision Industry Co., Ltd. | IPC: G06F1/16 | Abstract: An enclosure for electronic device, includes a chassis and a cover. The chassis defines an opening. The chassis includes a drive bracket mounted therein. The drive bracket includes a side plate facing the opening. A through hole is defined in the side plate. A rotating member is pivotally mounted on the side plate. The rotating member includes a positioning pin. A data storage device is received in the drive bracket. The data storage device defines a locking hole in alignment with the through hole of the side plate. The cover is mounted on the chassis to cover the opening of the chassis. The cover abuts the rotating member so that the positioning pin is inserted in the through hole and the locking hole to secure the data storage device in the drive bracket of the chassis. | |||
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17 | US2010172082A1 |
ENCLOSURE FOR ELECTRONIC DEVICE
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Publication/Patent Number: US2010172082A1 | Publication Date: 2010-07-08 | Application Number: 12/487,298 | Filing Date: 2009-06-18 | Inventor: Chen, Yun-lung Zhang zhun liang Luo, Pei-bin | Assignee: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD. HON HAI PRECISION INDUSTRY CO., LTD. | IPC: H05K5/00 | Abstract: An enclosure for electronic device, includes a chassis and a cover. The chassis defines an opening. The chassis includes a drive bracket mounted therein. The drive bracket includes a side plate facing the opening. A through hole is defined in the side plate. A rotating member is pivotally mounted on the side plate. The rotating member includes a positioning pin. A data storage device is received in the drive bracket. The data storage device defines a locking hole in alignment with the through hole of the side plate. The cover is mounted on the chassis to cover the opening of the chassis. The cover abuts the rotating member so that the positioning pin is inserted in the through hole and the locking hole to secure the data storage device in the drive bracket of the chassis. | |||
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18 | WO2007018894A3 |
A KIT OF LYOPHILIZED THROMBIN AND LYOPHILIZED FIBRINOGEN USED TO COMPOUND FIBRIN MEMBRANE
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Publication/Patent Number: WO2007018894A3 | Publication Date: 2009-01-08 | Application Number: 2006026739 | Filing Date: 2006-07-11 | Inventor: Hoang, Kieu Shu, Bixiong Xia, Zhao Junhui, Li Meecham, Thu Ho Zhang, Zhun | Assignee: HOANG, KIEU SHU, BIXIONG XIA, ZHAO JUNHUI, LI MEECHAM, THU, HO ZHANG, ZHUN | IPC: A61K38/48 | Abstract: A kit of lyophilized thrombin and lyophilized fibrinogen comprises fibrinogen of 50- 100 mg/ml | |||
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19 | EP1924278A4 |
A KIT OF LYOPHILIZED THROMBIN AND LYOPHILIZED FIBRINOGEN USED TO COMPOUND FIBRIN MEMBRANE
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Publication/Patent Number: EP1924278A4 | Publication Date: 2009-08-12 | Application Number: 06786779 | Filing Date: 2006-07-11 | Inventor: Zhang, Zhun Meecham, Thu Ho Shu, Bixiong Xia, Zhao Junhui, Li Hoang, Kieu | Assignee: Hoang, Kieu | IPC: A61K38/48 | ||||
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20 | TWM359177U |
Electronic device enclosure
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Publication/Patent Number: TWM359177U | Publication Date: 2009-06-11 | Application Number: 98200842 | Filing Date: 2009-01-16 | Inventor: Chen, Yun-lung Luo, Pei-bin Zhang zhun liang | Assignee: Hon Hai Precision Industry Co., Ltd. | IPC: H05K5/00 |