Country
Full text data for US and EP
Status
Type
Filing Date
Publication Date
Inventor
Assignee
Click to expand
IPC
No.
Publication Number
Title
Publication/Patent Number Publication/Patent Number
Publication date Publication date
Application number Application number
Filing date Filing date
Inventor Inventor
Assignee Assignee
IPC IPC
1
US10218418B2
Publication/Patent Number: US10218418B2
Publication date: 2019-02-26
Application number: 15/335,625
Filing date: 2016-10-27
Abstract: This invention provides a relay precoder selection method for two-way amplify-and-forward multiple-input multiple-output (MIMO) relay systems and communication devices using the selection method or the selected relay precoder. According to the relationship between a relay precoder and the singular values of the effective MIMO channels, a set of candidate relay precoders are constructed based on the singular vector subspaces of cascaded MIMO channels, and one of them is selected for meeting a specific design criterion, such as the minimum sum of mean-squared errors, the maximum sum of channel capacities, and the minimum or maximum sum of condition numbers, where the condition number is defined as the ratio of the largest to the smallest singular value of a MIMO channel. As compared with the iterative design methods with the best performance, this invention achieves close performance while requiring much lower computational complexity. This invention provides a relay precoder selection method for two-way amplify-and-forward multiple-input multiple-output (MIMO) relay systems and communication devices using the selection method or the selected relay precoder. According to the relationship between a relay ...more ...less
2
US10249360B1
Publication/Patent Number: US10249360B1
Publication date: 2019-04-02
Application number: 15/827,737
Filing date: 2017-11-30
Abstract: A method and a circuit for generating a reference voltage are provided. The circuit includes: a first column of dummy neurons with weight 0 and a second column of dummy neurons with weight 1, wherein the plurality word-lines are connected to the dummy neurons in the first and second columns, respectively; a bit-line connected to a voltage source and the first column of dummy neurons; a complementary bit-line is connected to the voltage source and the second column of dummy neurons, wherein when the artificial neural network system is operated to sense the neurons of the memory cell array, one or more of the plurality of word-lines are activated, and the corresponding dummy neurons of the first column and the second column are activated to generate the reference voltage at the output end for sensing the neurons of the memory cell array. A method and a circuit for generating a reference voltage are provided. The circuit includes: a first column of dummy neurons with weight 0 and a second column of dummy neurons with weight 1, wherein the plurality word-lines are connected to the dummy neurons in the first and ...more ...less
3
US10192611B1
Publication/Patent Number: US10192611B1
Publication date: 2019-01-29
Application number: 15/695,029
Filing date: 2017-09-05
Abstract: The present provides a sensing circuit, a set of pre-amplifiers, and an operating method thereof. The set of pre-amplifiers includes a first pre-amplifier and a second pre-amplifier. The first pre-amplifier is coupled to a first input terminal of the sense amplifier. The second pre-amplifier is coupled to a second input terminal of the sense amplifier. The first pre-amplifier and the second pre-amplifier respectively performs a discharging operation to discharge the first input terminal and the second input terminal of the sense amplifier after the first input terminal and the second input terminal of the sense amplifier are charged to a predetermined voltage. One of the first pre-amplifier and the second pre-amplifier amplifies a voltage difference between the first input terminal and the second input terminal of the sense amplifier by terminating the discharging operation of another of the first pre-amplifier and the second pre-amplifier. The present provides a sensing circuit, a set of pre-amplifiers, and an operating method thereof. The set of pre-amplifiers includes a first pre-amplifier and a second pre-amplifier. The first pre-amplifier is coupled to a first input terminal of the sense amplifier. The second ...more ...less
4
US10322088B2
Publication/Patent Number: US10322088B2
Publication date: 2019-06-18
Application number: 15/710,846
Filing date: 2017-09-21
Abstract: The present disclosure provides a sustained-release composition including a sodium hydrosulfide and a carrier. The carrier is provided for carrying the sodium hydrosulfide with an effective amount and includes a first component and a second component. The first component includes a paraffin wax, and the second component includes a fatty alcohol, a fatty acid or a phospholipid. The present disclosure also provides a method for fabricating the sustained-release composition. The method includes providing a first solution, providing the carrier, providing a second solution, performing an oil-in-water emulsification, and cooling the emulsion. In addition, the present disclosure provides a method for treating the chronic wounds. The method includes administering an effective amount of the aforementioned sustained-release composition to a subject suffered from the chronic wounds. The present disclosure provides a sustained-release composition including a sodium hydrosulfide and a carrier. The carrier is provided for carrying the sodium hydrosulfide with an effective amount and includes a first component and a second component. The first component ...more ...less
5
US10204681B2
Publication/Patent Number: US10204681B2
Publication date: 2019-02-12
Application number: 15/591,085
Filing date: 2017-05-09
Abstract: The present disclosure provides a control circuit of a memory array. The control circuit includes a first switch and a set termination circuit. The first switch is connected between a first voltage source and a data line of a resistive memory cell of the memory array. The set termination circuit has a first terminal connected to a control terminal of the first switch and a second terminal connected to the data line of the resistive memory cell of the memory array. When a data line voltage of the data line decreases to be lower than a first voltage in a first duration of the resistive memory cell performing a set operation, the set termination circuit turns off the first switch to terminate the set operation by stopping providing the first voltage of the first voltage source to the data line. The present disclosure provides a control circuit of a memory array. The control circuit includes a first switch and a set termination circuit. The first switch is connected between a first voltage source and a data line of a resistive memory cell of the memory array. The set ...more ...less
6
US10188768B2
Publication/Patent Number: US10188768B2
Publication date: 2019-01-29
Application number: 13/607,742
Filing date: 2012-09-09
Abstract: A miniature scent generating device includes a scented component, a plurality of granular first materials, and a driving unit. The scented component includes a housing, a chamber located in the housing, a ventilation opening penetrating through the housing to communicate with the chamber, and a vibration unit disposed in the chamber. The first materials are provided in the chamber, and have a first scent. The driving unit is connected to the vibration unit. The vibration unit is controlled by the driving unit to vibrate and produce an airflow of perturbation in the chamber, so as to prompt the first materials to pass through the ventilation opening and discharge out of the chamber to disperse the first scent. The miniature scent generating device has the advantage of unlikely spoiled and readily controlling a release concentration of the scent. A miniature scent generating device includes a scented component, a plurality of granular first materials, and a driving unit. The scented component includes a housing, a chamber located in the housing, a ventilation opening penetrating through the housing to communicate with ...more ...less
7
US10245570B2
Publication/Patent Number: US10245570B2
Publication date: 2019-04-02
Application number: 15/009,143
Filing date: 2016-01-28
Abstract: A multi-channel magnetic control system is provided, which is used for mixing fluids containing magnetic particles or separating magnetic species. In the multi-channel magnetic control system, a plurality of magnetic field switches are allocated to surround a plurality of channels, and the magnetization directions of the magnetic field switches are controlled to generate an uneven local magnetic field gradient, so as to achieve the purpose of fluid mixing or separating the magnetic species. This system can be also used as controllable flow resistance devices for magnetic fluids. Based on the demand of magnetic field distribution, overall or local control of the magnetic field switches can be executed to perform parallel processing over the multi-channel system of multi-dimensional allocation, so as to effectively save the processing time. The mixing or separation rate can be obtained via detecting residual magnetic species by magnetoresistive sensors arranged in inlets and outlets of channels. A multi-channel magnetic control system is provided, which is used for mixing fluids containing magnetic particles or separating magnetic species. In the multi-channel magnetic control system, a plurality of magnetic field switches are allocated to surround a plurality of ...more ...less
8
US10262725B1
Publication/Patent Number: US10262725B1
Publication date: 2019-04-16
Application number: 15/827,717
Filing date: 2017-11-30
Abstract: A selective bit-line sensing method is provided. The selective bit-line sensing method includes the steps of: generating a neuron weights information, the neuron weights information defines a distribution of 0's and 1's storing in the plurality of memory cells of the memory array; and selectively determining either the plurality of bit-lines or the plurality of complementary bit-lines to be sensed in a sensing operation according to the neuron weights information. When the plurality of bit-lines are determined to be sensed, the plurality of first word-lines are activated by the artificial neural network system through the selective bit-line detection circuit, and when the plurality of complementary bit-lines are determined to be sensed, the plurality of second word-lines are activated by the artificial neural network system. A selective bit-line sensing method is provided. The selective bit-line sensing method includes the steps of: generating a neuron weights information, the neuron weights information defines a distribution of 0's and 1's storing in the plurality of memory cells of the memory ...more ...less
9
US20190115074A1
Publication/Patent Number: US20190115074A1
Publication date: 2019-04-18
Application number: 16/218,505
Filing date: 2018-12-13
Abstract: The present disclosure provides a control circuit of a memory array. The control circuit includes a first switch and a set termination circuit. The first switch is connected between a first voltage source and a data line of a resistive memory cell of the memory array. The set termination circuit has a first terminal connected to a control terminal of the first switch and a second terminal connected to the data line of the resistive memory cell of the memory array. When a data line voltage of the data line decreases to be lower than a first voltage in a first duration of the resistive memory cell performing a set operation, the set termination circuit turns off the first switch to terminate the set operation by stopping providing the first voltage of the first voltage source to the data line. The present disclosure provides a control circuit of a memory array. The control circuit includes a first switch and a set termination circuit. The first switch is connected between a first voltage source and a data line of a resistive memory cell of the memory array. The set ...more ...less
10
US10186318B1
Publication/Patent Number: US10186318B1
Publication date: 2019-01-22
Application number: 15/939,262
Filing date: 2018-03-28
Abstract: A sense amplifier of a resistive memory is controlled by a bit line and a reference line. A voltage sense amplifier has a bit-line input node and a reference input node. A margin enhanced pre-amplifier includes a bit-line two-terminal switching element, a bit-line capacitor, a bit-line three-terminal switching element, a reference two-terminal switching element, a reference capacitor and a reference three-terminal switching element. A read voltage difference between the voltage level of the bit line and the reference line is generated. The bit-line two-terminal switching element, the bit-line three-terminal switching element, the reference two-terminal switching element and the reference three-terminal switching element are synchronizedly switched so as to generate a margin enhanced difference between the voltage level of the bit-line input node and the voltage level of the reference input node. The margin enhanced difference is equal to or greater than three times the read voltage difference. A sense amplifier of a resistive memory is controlled by a bit line and a reference line. A voltage sense amplifier has a bit-line input node and a reference input node. A margin enhanced pre-amplifier includes a bit-line two-terminal switching element, a bit-line capacitor, a ...more ...less
11
US10280111B2
Publication/Patent Number: US10280111B2
Publication date: 2019-05-07
Application number: 15/601,569
Filing date: 2017-05-22
Abstract: An energy-saving glass includes a glass substrate, and a periodic metal layer deposited on the glass substrate and having a honeycomb array of round holes. A method of manufacturing the energy-saving glass includes: providing a template having multiple template spots arranged in a honeycomb array; forming on the template a transfer metal layer having multiple metal spots disposed respectively on the template spots; transferring the metal spots onto a photoresist layer on a glass substrate; etching the photoresist layer exposed from the metal spots to leave photoresist spots underlying the metal spots on the glass substrate; forming a periodic metal layer around the photoresist spots; and removing the photoresist spots. An energy-saving glass includes a glass substrate, and a periodic metal layer deposited on the glass substrate and having a honeycomb array of round holes. A method of manufacturing the energy-saving glass includes: providing a template having multiple template spots arranged in ...more ...less
12
US20190155125A1
Publication/Patent Number: US20190155125A1
Publication date: 2019-05-23
Application number: 16/190,838
Filing date: 2018-11-14
Abstract: A method and system for utilizing the laser defocusing effect for phase matching of high order harmonic generation in a tight focusing geometry are provided. The most suitable focusing geometry, especially those five parameters including: (1) the aperture size of the adjustable iris, (2) the focus position with respect to the gas cell, (3) the backing pressure of the gas cell, (4) the focal length and (5) the length of the gas cell, for achieving phase matching of the target harmonic order and maximal yield of the target harmonic order are disclosed. A method and system for utilizing the laser defocusing effect for phase matching of high order harmonic generation in a tight focusing geometry are provided. The most suitable focusing geometry, especially those five parameters including: (1) the aperture size of the adjustable ...more ...less
13
US20190175778A1
Publication/Patent Number: US20190175778A1
Publication date: 2019-06-13
Application number: 15/835,474
Filing date: 2017-12-08
Abstract: The present disclosure provides a composite structure and a method for manufacturing the same. The composite structure includes a degradation activity donor and a supporter. The degradation activity donor has a piezoelectric property. The supporter carries the degradation activity donor, wherein the degradation activity donor is completely or partially covered by the supporter. The present disclosure provides a composite structure and a method for manufacturing the same. The composite structure includes a degradation activity donor and a supporter. The degradation activity donor has a piezoelectric property. The supporter carries the degradation ...more ...less
14
US10344258B2
Publication/Patent Number: US10344258B2
Publication date: 2019-07-09
Application number: 15/081,149
Filing date: 2016-03-25
Abstract: A sorting device is provided. The sorting device includes: a carrier substrate; an input unit disposed on the carrier substrate for inputting a biological sample into the sorting device; a porous material disposed on the carrier substrate and adjacent to the input unit, wherein the porous material contains antigen molecules having specificity to a target biological analyte; a driving module generating at least one driving force in the porous material so as to sort the biological sample based on the affinity for the antigen and the driving force; and an output unit disposed on the carrier substrate and adjacent to the porous material for collecting the sorted target biological analyte. A sorting method is also provided. A sorting device is provided. The sorting device includes: a carrier substrate; an input unit disposed on the carrier substrate for inputting a biological sample into the sorting device; a porous material disposed on the carrier substrate and adjacent to the input unit, wherein ...more ...less