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1
US10171317B2
Publication/Patent Number: US10171317B2
Publication date: 2019-01-01
Application number: 14/357,882
Filing date: 2012-10-24
Abstract: The management server causes an output section to output a startup date and time, shutdown date and time, minimum, maximum, and average values, and an occurrence count and durations of a predetermined event, for each of the operation time periods from the startup to shutdown in a unit of the remote monitoring terminal device, and causes the output section to output the startup date and time, shutdown date and time, and a movement locus of the mobile work vehicle or vessel based on the location information, for each of the operation time periods from the startup to shutdown in the unit of the remote monitoring terminal device. The management server causes an output section to output a startup date and time, shutdown date and time, minimum, maximum, and average values, and an occurrence count and durations of a predetermined event, for each of the operation time periods from the startup to shutdown in ...more ...less
2
US20190142852A1
Publication/Patent Number: US20190142852A1
Publication date: 2019-05-16
Application number: 16/118,376
Filing date: 2018-08-30
Abstract: A heterocyclic compound represented by the general formula (1) or a salt thereof: wherein m, l, and n respectively represent an integer of 1 or 2; X represents —O— or —CH2—; R1 represents hydrogen, a lower alkyl group, a hydroxy-lower alkyl group, a protecting group, or a tri-lower alkylsilyloxy-lower alkyl group; R2 and R3, which are the same or different, each independently represent hydrogen or a lower alkyl group; or R2 and R3 are bonded to form a cyclo-C3-C8 alkyl group; and R4 represents an aromatic group or a heterocyclic group, wherein the aromatic or heterocyclic group may have one or more arbitrary substituent(s). A heterocyclic compound represented by the general formula (1) or a salt thereof: wherein m, l, and n respectively represent an integer of 1 or 2; X represents —O— or —CH2—; R1 represents hydrogen, a lower alkyl group, a ...more ...less
3
US10242733B2
Publication/Patent Number: US10242733B2
Publication date: 2019-03-26
Application number: 15/964,864
Filing date: 2018-04-27
Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented. Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line ...more ...less
4
US10121705B2
Publication/Patent Number: US10121705B2
Publication date: 2018-11-06
Application number: 14/469,920
Filing date: 2014-08-27
Abstract: To suppress performance degradation of a semiconductor device, when the width of a first active region having a first field effect transistor formed therein is smaller than the width of a second active region having a second field effect transistor formed therein, the height of a surface of a first raised source layer of the first field effect transistor is made larger than the height of a surface of a second raised source layer of the second field effect transistor. Moreover, the height of a first surface of a raised drain layer of the first field effect transistor is made larger than a surface of a second raised drain layer of the second field effect transistor. To suppress performance degradation of a semiconductor device, when the width of a first active region having a first field effect transistor formed therein is smaller than the width of a second active region having a second field effect transistor formed therein, the height of ...more ...less
5
US9984744B2
Publication/Patent Number: US9984744B2
Publication date: 2018-05-29
Application number: 15/680,269
Filing date: 2017-08-18
Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented. Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line ...more ...less
6
US10064879B2
Publication/Patent Number: US10064879B2
Publication date: 2018-09-04
Application number: 15/495,862
Filing date: 2017-04-24
Abstract: A heterocyclic compound represented by the general formula (1) or a salt thereof: wherein m, l, and n respectively represent an integer of 1 or 2; X represents —O— or —CH2—; R1 represents hydrogen, a lower alkyl group, a hydroxy-lower alkyl group, a protecting group, or a tri-lower alkylsilyloxy-lower alkyl group; R2 and R3, which are the same or different, each independently represent hydrogen or a lower alkyl group; or R2 and R3 are bonded to form a cyclo-C3-C8 alkyl group; and R4 represents an aromatic group or a heterocyclic group, wherein the aromatic or heterocyclic group may have one or more arbitrary substituent(s). A heterocyclic compound represented by the general formula (1) or a salt thereof: wherein m, l, and n respectively represent an integer of 1 or 2; X represents —O— or —CH2—; R1 represents hydrogen, a lower alkyl group, a ...more ...less
7
US9915710B2
Publication/Patent Number: US9915710B2
Publication date: 2018-03-13
Application number: 15/088,185
Filing date: 2016-04-01
Abstract: A magnetic sensor is provided in which in a case where magnetization amounts of the first ferromagnetic layer and the second ferromagnetic layer in the first magnetic sensor element are respectively set to be Mst11 and Mst12 and magnetization amounts of the first ferromagnetic layer and the second ferromagnetic layer in the second magnetic sensor element are respectively set to be Mst21 and Mst22, in a case of Mst11>Mst12, a relationship of Mst21>Mst22 is satisfied, and in a case of Mst11<Mst12, a relationship of Mst21<Mst22 is satisfied. A magnetic sensor is provided in which in a case where magnetization amounts of the first ferromagnetic layer and the second ferromagnetic layer in the first magnetic sensor element are respectively set to be Mst11 and Mst12 and magnetization amounts of the first ferromagnetic ...more ...less
8
US20180247692A1
Publication/Patent Number: US20180247692A1
Publication date: 2018-08-30
Application number: 15/964,864
Filing date: 2018-04-27
Abstract: Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line is forced into a floating state according to the bit line potential on a selected column and has the voltage level changed, and a latching capability of a selected memory cell is reduced to write data fast. Even with a low power supply voltage, a static semiconductor memory device that can stably perform write and read of data is implemented. Cell power supply lines are arranged for memory cell columns, and adjust impedances or voltage levels of the cell power supply lines according to the voltage levels of bit lines in the corresponding columns, respectively. In the data write operation, the cell power supply line ...more ...less