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1
US10177110B2
Publication/Patent Number: US10177110B2
Publication date: 2019-01-08
Application number: 16/034,102
Filing date: 2018-07-12
Inventor: Bando, Koji  
Abstract: An electronic device includes: a substrate having an upper surface (front surface) on which a semiconductor chip is mounted, and a lower surface (back surface) opposite to the upper surface; and a housing (case) fixed to the substrate through an adhesive material. The housing has through-holes each formed on one short side and the other short side in an X direction. The substrate is disposed between the through-holes. A part of the upper surface of the substrate is fixed so as to face a part of a stepped surface formed at a height different from that of a lower surface of the housing. Further, an interval (distance) between a part (stepped surface) extending along a short side of the housing in the stepped surface and the upper surface of the substrate is larger than an interval (distance) between a part (stepped surface) extending along a long side of the housing in the stepped surface and the upper surface of the substrate. An electronic device includes: a substrate having an upper surface (front surface) on which a semiconductor chip is mounted, and a lower surface (back surface) opposite to the upper surface; and a housing (case) fixed to the substrate through an adhesive material. The housing ...more ...less
2
US10211104B2
Publication/Patent Number: US10211104B2
Publication date: 2019-02-19
Application number: 15/677,677
Filing date: 2017-08-15
Abstract: A processing method of a package wafer includes a mold resin removal step of exposing grooves filled with a mold resin of the package wafer in a peripheral surplus region, a holding step of holding the package wafer in such a manner that the grooves are exposed, an orientation adjustment step of causing the grooves to be parallel to a processing-feed direction in which processing feeding of a chuck table is carried out when dividing grooves are formed, a coordinate registration step of imaging both ends of the plural grooves exposed at a peripheral edge and registering coordinate information of both ends or a single side of the grooves from taken images, and a dividing groove forming step of calculating the positions of the dividing grooves to be formed along the grooves based on the registered coordinate information of the grooves and forming the dividing grooves along the grooves. A processing method of a package wafer includes a mold resin removal step of exposing grooves filled with a mold resin of the package wafer in a peripheral surplus region, a holding step of holding the package wafer in such a manner that the grooves are exposed, an orientation ...more ...less
3
US10361228B2
Publication/Patent Number: US10361228B2
Publication date: 2019-07-23
Application number: 14/881,773
Filing date: 2015-10-13
Inventor: Watts, James Denziel  
Abstract: A technique comprising: securing a device substrate (8) to a carrier (1) using one or more adhesive elements (6); forming electronic elements (10) on the device substrate with the device substrate thus secured to the carrier; and thereafter reducing the adhesion strength of at least one of the one or more adhesive elements to facilitate the release of the substrate from the carrier. A technique comprising: securing a device substrate (8) to a carrier (1) using one or more adhesive elements (6); forming electronic elements (10) on the device substrate with the device substrate thus secured to the carrier; and thereafter reducing the adhesion strength of at ...more ...less
4
US10321226B2
Publication/Patent Number: US10321226B2
Publication date: 2019-06-11
Application number: 15/968,676
Filing date: 2018-05-01
Abstract: A surface mount package for a micro-electro-mechanical system (MEMS) microphone die is disclosed. The surface mount package features a substrate with metal pads for surface mounting the package to a device's printed circuit board and for making electrical connections between the microphone package and the device's circuit board. The surface mount microphone package has a cover, and the MEMS microphone die is substrate-mounted and acoustically coupled to an acoustic port provided in the surface mount package. The substrate and the cover are joined together to form the MEMS microphone, and the substrate and cover cooperate to form an acoustic chamber for the substrate-mounted MEMS microphone die. A surface mount package for a micro-electro-mechanical system (MEMS) microphone die is disclosed. The surface mount package features a substrate with metal pads for surface mounting the package to a device's printed circuit board and for making electrical connections between the ...more ...less
5
US10297516B2
Publication/Patent Number: US10297516B2
Publication date: 2019-05-21
Application number: 15/746,013
Filing date: 2017-03-01
Abstract: A semiconductor device includes a semiconductor element, a base, and an outer packaging resin. The base has a mounting surface, on which the semiconductor element is mounted, and a groove provided around the semiconductor element on the mounting surface. An outer packaging resin covers the semiconductor element and the base, and is fixed to the base by filling the groove. A bottom of the groove includes a first recess-projection having a first amplitude and a first repetition interval along an extending direction of the groove. The first recess-projection includes a second recess-projection having a second amplitude smaller than the first amplitude and a second repetition interval shorter than the first repetition interval along the extending direction of the groove. A semiconductor device includes a semiconductor element, a base, and an outer packaging resin. The base has a mounting surface, on which the semiconductor element is mounted, and a groove provided around the semiconductor element on the mounting surface. An outer packaging resin ...more ...less
6
US10278289B2
Publication/Patent Number: US10278289B2
Publication date: 2019-04-30
Application number: 15/903,064
Filing date: 2018-02-23
Abstract: A resin circuit board includes a multilayer body, mounting land conductors, and second components. The multilayer body includes thermoplastic resin layers laminated together. The mounting land conductors are provided on a front surface of the multilayer body, and terminal conductors of a first component are bonded to the mounting land conductors by a thermal bonding method. The second components are disposed in the multilayer body and each has a modulus of elasticity greater than that of the multilayer body. When the multilayer body is seen in plan view, the second components are arranged such that a straight line connecting the second components passes through the center of gravity of the first component and such that the second components are superposed with the mounting land conductors. A resin circuit board includes a multilayer body, mounting land conductors, and second components. The multilayer body includes thermoplastic resin layers laminated together. The mounting land conductors are provided on a front surface of the multilayer body, and terminal ...more ...less
7
US10403593B2
Publication/Patent Number: US10403593B2
Publication date: 2019-09-03
Application number: 15/837,560
Filing date: 2017-12-11
Abstract: A semiconductor module that restrains the occurrence of detachment and an operation failure. The semiconductor module includes a PCB base, a conductive die pad provided on the PCB base, a semiconductor die provided on the conductive die pad, and a conductive die bonding agent that electrically connects the conductive die pad and the semiconductor die. The semiconductor module further includes a wire bonding pad provided on the PCB base, a wire that electrically connects the wire bonding pad and the semiconductor die, and a sealing resin that seals the conductive die pad, the semiconductor die, the conductive die bonding agent, the wire bonding pad, and the wire. In a planar view, the area of the conductive die pad is 5.0 mm2 or less. A semiconductor module that restrains the occurrence of detachment and an operation failure. The semiconductor module includes a PCB base, a conductive die pad provided on the PCB base, a semiconductor die provided on the conductive die pad, and a conductive die bonding agent ...more ...less
8
US10373918B2
Publication/Patent Number: US10373918B2
Publication date: 2019-08-06
Application number: 15/440,461
Filing date: 2017-02-23
Inventor: Hu, Dyi-chung  
Assignee: Hu, Dyi-Chung
Abstract: A package substrate is disclosed. The package substrate includes a molding layer, a redistribution structure, and a build-up structure. The redistribution structure is embedded in the molding layer with a surface exposed by the molding layer. The build-up structure is formed on the bottom surface of the molding layer. An inner stress caused by a CTE difference between different materials in the package substrate is reduced by forming at least one groove which is arranged around the periphery of the redistribution structure onto the top surface of the molding layer, thereby improving the problem of the redistribution structure cracking in the prior art. A package substrate is disclosed. The package substrate includes a molding layer, a redistribution structure, and a build-up structure. The redistribution structure is embedded in the molding layer with a surface exposed by the molding layer. The build-up structure is formed on ...more ...less
9
US10383231B2
Publication/Patent Number: US10383231B2
Publication date: 2019-08-13
Application number: 14/759,459
Filing date: 2013-02-08
Assignee: FUJIKURA LTD.
Abstract: Provided is a component-embedded board which includes: a first board including a first insulation layer, a first conductive layer formed on a second face of the first insulation layer, and an interlayer conductive portion penetrating the first insulation layer to be connected to the first conductive layer and protruding from a first face of the first insulation layer; an electric component connected to the interlayer conductive portion; and a second board including a second insulation layer having an opening portion incorporating the electric component, and a second conductive layer formed on at least either one of a first face and a second face of the second insulation layer. The second conductive layer includes a frame portion. The opening portion is formed so as to penetrate the second insulation layer in a thickness direction thereof over the entirety of the inner region of the frame portion. Provided is a component-embedded board which includes: a first board including a first insulation layer, a first conductive layer formed on a second face of the first insulation layer, and an interlayer conductive portion penetrating the first insulation layer to be connected to ...more ...less
10
US2019035707A1
Publication/Patent Number: US2019035707A1
Publication date: 2019-01-31
Application number: 16/073,745
Filing date: 2017-07-14
Inventor: Ikeda, Kosuke  
Abstract: An electronic module comprises a substrate 11, 21, an other-side electronic component 18, 23 provided on the other side of the substrate 11, 21, a one-side electronic component 13, 28 provided on one side of the substrate 11, 21 and a connecting terminal 115, 125 having an other-side extending part 119a, 129a extending to circumferential outside of the substrate 11, 21 on the other side of the substrate 11, 21, a one-side extending part 119b, 129b extending to circumferential outside of the substrate 11, 21 on one side of the substrate 11, 21, and a connecting part 118, 128 connecting the other-side extending part 119a, 129a with the one-side extending part 119b, 129b at the circumferential outside of the substrate 11, 21. An electronic module comprises a substrate 11, 21, an other-side electronic component 18, 23 provided on the other side of the substrate 11, 21, a one-side electronic component 13, 28 provided on one side of the substrate 11, 21 and a connecting terminal 115, 125 having an ...more ...less
11
US2019257880A1
Publication/Patent Number: US2019257880A1
Publication date: 2019-08-22
Application number: 16/401,850
Filing date: 2019-05-02
Abstract: A circuit test structure including an interposer for electrically connection to a chip, wherein the interposer includes a conductive line, and the conductive line traces a perimeter of the interposer. The circuit test structure further includes at least three electrical connections to the conductive line. The circuit test structure further includes a testing site. The circuit test structure further includes a through substrate via (TSV) connecting the testing site to the conductive line. A circuit test structure including an interposer for electrically connection to a chip, wherein the interposer includes a conductive line, and the conductive line traces a perimeter of the interposer. The circuit test structure further includes at least three electrical ...more ...less
12
US2019103361A1
Publication/Patent Number: US2019103361A1
Publication date: 2019-04-04
Application number: 15/721,788
Filing date: 2017-09-30
Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate having a top surface and a vertical surface extending downward from the top surface. The top surface and the vertical surface can define an edge. The electronic device package can also include an electronic component disposed on the top surface of the substrate and electrically coupled to the substrate. In addition, the electronic device package can include an underfill material disposed at least partially between the electronic component and the top surface of the substrate. A lateral portion of the underfill material can extend from the electronic component to at least the edge. Associated systems and methods are also disclosed. Electronic device package technology is disclosed. In one example, an electronic device package can include a substrate having a top surface and a vertical surface extending downward from the top surface. The top surface and the vertical surface can define an edge. The ...more ...less
13
US2019096701A1
Publication/Patent Number: US2019096701A1
Publication date: 2019-03-28
Application number: 16/204,299
Filing date: 2018-11-29
Inventor: Kato, Noboru  
Abstract: A plurality of surface mounting components are arranged on a component mounting surface of a transfer substrate. A resin layer is formed on the transfer substrate and the plurality of surface mounting components are buried in the resin layer. The resin layer is peeled off the transfer substrate, with the plurality of surface mounting components buried in the resin layer, to expose a surface resin layer. An intermediate auxiliary layer is provided on the exposed surface of the resin layer. The intermediate auxiliary layer has openings to expose respective mounting terminals of the surface mounting component. Metal materials are arranged in the openings. A wiring sheet which includes a thermoplastic resin sheet with an electrode pattern and a plurality of unmetallized via patterns is joined to the intermediate auxiliary layer so that each of the via patterns aligns with a respective one of the openings in the intermediate auxiliary layer. Heat treatment is performed to fuse the thermoplastic resin sheet to the intermediate auxiliary layer and to metallize the via patterns to connect the via patterns to the openings in the intermediate auxiliary layer and therefore the mounting terminals and the electrode pattern through the metal materials and the via patterns. A plurality of surface mounting components are arranged on a component mounting surface of a transfer substrate. A resin layer is formed on the transfer substrate and the plurality of surface mounting components are buried in the resin layer. The resin layer is peeled off the ...more ...less