Country
Full text data for US and EP
Status
Type
Filing Date
Publication Date
Inventor
Assignee
Click to expand
IPC
No.
Publication Number
Title
Publication/Patent Number Publication/Patent Number
Publication date Publication date
Application number Application number
Filing date Filing date
Inventor Inventor
Assignee Assignee
IPC IPC
1
US20190109590A1
Publication/Patent Number: US20190109590A1
Publication date: 2019-04-11
Application number: 16/201,915
Filing date: 2018-11-27
Abstract: Embodiments herein may present an integrated circuit including a switch, where the switch together with other switches forms a network of switches to perform a sequence of operations according to a structure of a collective tree. The switch includes a first number of input ports, a second number of output ports, a configurable crossbar to selectively couple the first number of input ports to the second number of output ports, and a computation engine coupled to the first number of input ports, the second number of output ports, and the crossbar. The computation engine of the switch performs an operation corresponding to an operation represented by a node of the collective tree. The switch further includes one or more registers to selectively configure the first number of input ports and the configurable crossbar. Other embodiments may be described and/or claimed. Embodiments herein may present an integrated circuit including a switch, where the switch together with other switches forms a network of switches to perform a sequence of operations according to a structure of a collective tree. The switch includes a first number of input ...more ...less
2
US10250206B2
Publication/Patent Number: US10250206B2
Publication date: 2019-04-02
Application number: 15/730,918
Filing date: 2017-10-12
Inventor: Honda, Kazutaka  
Abstract: A voltage detection circuit includes two detection capacitors, which are paired and configured differentially, first to third detection switches, a drive part, a minimum selector and a maximum selector. The first detection switch is formed of a pMOS transistor, which opens and closes a path between one of the detection capacitors and an input node. The second detection switch is formed of an nMOS transistor, which opens and closes a path between the other of the detection capacitors and an input node. The third detection switch is formed of a series circuit of a pMOS transistor and an nMOS transistor, which open and close a path between two detection capacitors. The driving part turns on and off complementarily between the first and second switches and the third detection switch. The minimum selector applies a lower one of voltages of the input nodes as a substrate potential of the nMOS transistor. The maximum selector applies a higher one of the voltages of the input nodes as a substrate potential of the pMOS transistor. A voltage detection circuit includes two detection capacitors, which are paired and configured differentially, first to third detection switches, a drive part, a minimum selector and a maximum selector. The first detection switch is formed of a pMOS transistor, which opens and ...more ...less
3
US10250250B2
Publication/Patent Number: US10250250B2
Publication date: 2019-04-02
Application number: 15/689,491
Filing date: 2017-08-29
Abstract: The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability to digitize wide bandwidth RF signals. These applications benefit from input circuitry which can perform well with high speed, wide bandwidth RF signals. An input buffer and bootstrapped switch are designed to service such applications, and can be implemented in 28 nm complementary metal-oxide (CMOS) technology. The trend in wireless communication receivers is to capture more and more bandwidth to support higher throughput, and to directly sample the radio frequency (RF) signal to enable re-configurability and lower cost. Other applications like instrumentation also demand the ability ...more ...less
4
US10236871B2
Publication/Patent Number: US10236871B2
Publication date: 2019-03-19
Application number: 15/795,366
Filing date: 2017-10-27
Inventor: Chan, On Bon Peter  
Abstract: A pulse width filtering circuit for filtering pulse signals includes an input transition detection circuit detecting change of state of an input signal, including a first transition from a low signal to a high signal and a second transition from the high signal to the low signal; a first delay circuit determining whether the high signal from the first transition is maintained longer than a first period and, if so, generating a first output indicative of the first transition, after the first period; a second delay circuit determining whether the low signal from the second transition is maintained for longer than a second period and, if so, generating a second output indicative of the second transition, after the second period; and a switching circuit connected to the first and second delay circuits and selectively outputting the first output and the second output, based on the state of the input signal. A pulse width filtering circuit for filtering pulse signals includes an input transition detection circuit detecting change of state of an input signal, including a first transition from a low signal to a high signal and a second transition from the high signal to the low ...more ...less
5
US10256810B2
Publication/Patent Number: US10256810B2
Publication date: 2019-04-09
Application number: 15/926,158
Filing date: 2018-03-20
Inventor: Shirao, Akira  
Abstract: Provided are an electronic circuit and electronic timepiece that can initialize internal circuits even if chattering occurs when a battery is installed. In the electronic circuit, when the initialization state hold signal is input, the initialization control circuit continues outputting the initialization control signal at the first level until the clock signal is output; and when the initialization state hold signal is input and the clock signal is output, outputs the initialization control signal at the second level cancelling the initialization process to the initialization circuit. Provided are an electronic circuit and electronic timepiece that can initialize internal circuits even if chattering occurs when a battery is installed. In the electronic circuit, when the initialization state hold signal is input, the initialization control circuit continues ...more ...less
6
US10200041B2
Publication/Patent Number: US10200041B2
Publication date: 2019-02-05
Application number: 15/340,423
Filing date: 2016-11-01
Abstract: An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch circuits include n-type or p-type laterally diffused field effect transistors (NLDFETs or PLDFETs). At least one of the input switch circuits includes a level shifting switch circuit that is able to sample an input voltage that is greater than the upper supply voltage for the multiplexer. A shorting switch circuit, at an output of the multiplexer, includes a capacitively coupled gate drive circuit and is configured to short a first differential output to a second differential output after the input voltage is sampled. An analog multiplexer may be used for sampling an input voltage that is capable of having a higher voltage level than an upper supply voltage. The analog multiplexer includes a plurality of input switch circuits and a shorting switch circuit. The plurality of input switch ...more ...less
7
US10204563B2
Publication/Patent Number: US10204563B2
Publication date: 2019-02-12
Application number: 14/837,595
Filing date: 2015-08-27
Abstract: A semiconductor device including a test circuit is miniaturized. The semiconductor device includes r first input terminals (r is an integer of 2 or more), a second input terminal, r functional circuits, a demultiplexer, and a switch circuit. The demultiplexer is a pass transistor logic circuit. R output terminals of the demultiplexer are electrically connected to respective input terminals of the functional circuit and the input terminal is electrically connected to the second input teiminal. Input terminals of the r circuits are electrically connected to the respective first input terminals through the switch circuit. For example, a signal for verification is input to the first input terminal in verification of the functional circuit to operate the demultiplexer. One signal for verification is input to r functional circuits by the demultiplexer. A semiconductor device including a test circuit is miniaturized. The semiconductor device includes r first input terminals (r is an integer of 2 or more), a second input terminal, r functional circuits, a demultiplexer, and a switch circuit. The demultiplexer is a pass ...more ...less
8
EP3082260B1
Publication/Patent Number: EP3082260B1
Publication date: 2019-02-13
Application number: 16159758.8
Filing date: 2016-03-11
Inventor: Morishita, Yohei  
Abstract: A switch control circuit (100) includes: a clock generating circuit (120) that generates one or more periodic signals (B1-B4) having a predetermined cycle; a clock adjusting circuit (130) that generates one or more control signals (S1-S4) by adjusting a bias voltage of the one or more periodic signals and changing an ON period of the one or more periodic signals; and at least one switching circuit including one or more switches (S1-S4) that are switched to ON if respective amplitudes of the generated one or more control signals (S1-S4) is equal to or higher than a threshold value and that are switched to OFF if the respective amplitudes of the generated one or more control signals is less than the threshold value. A switch control circuit (100) includes: a clock generating circuit (120) that generates one or more periodic signals (B1-B4) having a predetermined cycle; a clock adjusting circuit (130) that generates one or more control signals (S1-S4) by adjusting a bias voltage of the one ...more ...less
9
US10306170B2
Publication/Patent Number: US10306170B2
Publication date: 2019-05-28
Application number: 15/601,071
Filing date: 2017-05-22
Inventor: Kim, Tae-gyu  
Assignee: SK hynix Inc.
Abstract: A comparison device includes a comparison block suitable for comparing an upper ramp signal or a lower ramp signal with a pixel signal, and outputting a comparison signal; a CDS block provided between a first input terminal into which the pixel signal is inputted and a negative input terminal of the comparison block, and configured to perform correlated double sampling; a second switch provided between a second input terminal into which the lower ramp signal is inputted and a positive input terminal of the comparison block; a third switch provided between a third input terminal into which the upper ramp signal is inputted and the positive input terminal of the comparison block; and a feedback control unit suitable for checking a magnitude of the pixel signal according the comparison signal and outputting a second control signal or a third control signal for controlling the second or third switch. A comparison device includes a comparison block suitable for comparing an upper ramp signal or a lower ramp signal with a pixel signal, and outputting a comparison signal; a CDS block provided between a first input terminal into which the pixel signal is inputted and a negative ...more ...less
10
EP2974016B1
Publication/Patent Number: EP2974016B1
Publication date: 2019-03-06
Application number: 14720851.6
Filing date: 2014-03-17
Inventor: Lee, Edward K. F.  
11
US10333508B2
Publication/Patent Number: US10333508B2
Publication date: 2019-06-25
Application number: 15/472,460
Filing date: 2017-03-29
Abstract: A semiconductor circuit is provided having a crossbar switch arrangement, which includes at least one multiplexer, an output of which corresponds to an output of the crossbar switch arrangement. The arrangement also includes: a set of input lines connected to data inputs of the multiplexer, the input lines extending along a first direction of the semiconductor circuit; and a set of select lines connected to select inputs of the multiplexer, the select lines extending along a second direction of the semiconductor circuit, where the second direction differs from the first direction. The multiplexer includes at least one multiplexing circuit for generating a multiplexed signal from signals present at the input lines and at least one primary output driver for generating an output signal from the multiplexed signal. A semiconductor circuit is provided having a crossbar switch arrangement, which includes at least one multiplexer, an output of which corresponds to an output of the crossbar switch arrangement. The arrangement also includes: a set of input lines connected to data inputs of the ...more ...less
12
US20190199347A1
Publication/Patent Number: US20190199347A1
Publication date: 2019-06-27
Application number: 16/219,175
Filing date: 2018-12-13
Abstract: A method of implementing a radio frequency (RF) switch comprises the steps of forming a first switch device on an integrated circuit substrate, forming a second switch device on the integrated circuit substrate, connecting the first switch device between a first pad and a second pad of the integrated circuit, connecting the second switch device between the second pad and a third pad of the integrated circuit, directly connecting a first control pad of the integrated circuit for receiving a first digital control signal to a control terminal of the first switch device, and directly connecting a second control pad of the integrated circuit for receiving a second digital control signal to a control terminal of the second switch device. A threshold voltage of the first and second switch devices is generally modified to allow being directly driven by the first digital control signal or the second digital control signal. A method of implementing a radio frequency (RF) switch comprises the steps of forming a first switch device on an integrated circuit substrate, forming a second switch device on the integrated circuit substrate, connecting the first switch device between a first pad and a second ...more ...less
13
EP3211752B1