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1 US10602622B2
Wiring board
Publication/Patent Number: US10602622B2 Publication Date: 2020-03-24 Application Number: 16/129,847 Filing Date: 2018-09-13 Inventor: Harazono, Masaaki   Umemoto, Takayuki   Yugawa, Hidetoshi   Assignee: KYOCERA Corporation   IPC: H05K1/02 Abstract: A wiring board includes a first insulating layer including a surface having unevenness, a second insulating layer including a surface having unevenness, laminated on the first insulating layer, and made of the same insulating material as that of the first insulating layer, insulating particles contained in the first and second insulating layers at rate of 40 to 80 wt %, a first wiring conductor on a first underlying metal layer surface, and a second wiring conductor on a second underlying metal layer surface. A second level difference of the unevenness in a surface region of the second insulating layer under the second wiring conductor is smaller than a first level difference of the unevenness in a surface region of the first insulating layer under the first wiring conductor, and the second level difference is not more than ⅖ of an average particle size of the insulating particles. A wiring board includes a first insulating layer including a surface having unevenness, a second insulating layer including a surface having unevenness, laminated on the first insulating layer, and made of the same insulating material as that of the first insulating layer ...More ...Less
2 US10595418B2
Method and apparatus for improving drilling electronics performance
Publication/Patent Number: US10595418B2 Publication Date: 2020-03-17 Application Number: 15/858,844 Filing Date: 2017-12-29 Inventor: Zheng, Herong   Hu, Fengtao   Zhao, Jinhai   Zhan, Sheng   Assignee: China Petroleum & Chemical Corporation   IPC: H05K1/03 Abstract: In a method for preparing a printed circuit board assembly (PCBA), the PCBA has a base circuit board having a plurality of electronic components installed thereon. First, the surface of the PCBA is cleaned with a cleaner. After cleaning, the staking material is applied around the plurality of electronic components around the circumference of the plurality of electronic components. After applying the staking material, the PCBA with the staking material is cured and inspected. In a method for preparing a printed circuit board assembly (PCBA), the PCBA has a base circuit board having a plurality of electronic components installed thereon. First, the surface of the PCBA is cleaned with a cleaner. After cleaning, the staking material is applied around ...More ...Less
3 US10595420B2
Encapsulation structure and display apparatus
Publication/Patent Number: US10595420B2 Publication Date: 2020-03-17 Application Number: 15/534,405 Filing Date: 2016-12-27 Inventor: Bao, Shanshan   Cui, Fuyi   Zhang, Liang   Assignee: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD   BOE TECHNOLOGY GROUP CO., LTD   IPC: H05K1/03 Abstract: An encapsulation structure and a related display apparatus are provided. The encapsulation structure includes a first substrate having a sealing region; a metal pattern on the sealing region; a thermal conductive layer, at least covering the metal pattern and electrically insulated from the metal pattern; and a sealing structure on the thermal conductive layer. An encapsulation structure and a related display apparatus are provided. The encapsulation structure includes a first substrate having a sealing region; a metal pattern on the sealing region; a thermal conductive layer, at least covering the metal pattern and electrically ...More ...Less
4 US10582631B2
Housings formed from three-dimensional circuits
Publication/Patent Number: US10582631B2 Publication Date: 2020-03-03 Application Number: 15/655,311 Filing Date: 2017-07-20 Inventor: Bharadwaj, Shravan   Assignee: APPLE INC.   IPC: H05K5/02 Abstract: A housing made from a circuit laminate includes first and second layers coupled together. Each includes a rigid, electrically insulating non-planar structural layer, flexible conductive traces disposed on surfaces of the structural layer, and flexible connector layers contacting to the flexible conductive traces. The housing may be formed from the circuit laminate using thermoforming or another process that co-molds the first and second layers. The structural layers stiffen the housing and/or form an environmental or other barrier so that the housing protects an internal component. A housing made from a circuit laminate includes first and second layers coupled together. Each includes a rigid, electrically insulating non-planar structural layer, flexible conductive traces disposed on surfaces of the structural layer, and flexible connector layers contacting ...More ...Less
5 US10575412B2
Electroconductive paste, electronic substrate, and method for manufacturing said substrate
Publication/Patent Number: US10575412B2 Publication Date: 2020-02-25 Application Number: 16/089,229 Filing Date: 2016-12-27 Inventor: Kobayashi, Hiroji   Hayashi, Yoko   Assignee: Mitsuboshi Belting Ltd.   IPC: H05K1/09 Abstract: An electroconductive paste comprises high melting point metal particles having a melting point that exceeds the firing temperature; molten metal particles containing a metal or an alloy that melts at the firing temperature, for which the melting point is 700° C. or less; active metal particles containing an active metal; and an organic vehicle. An electroconductive paste comprises high melting point metal particles having a melting point that exceeds the firing temperature; molten metal particles containing a metal or an alloy that melts at the firing temperature, for which the melting point is 700° C. or less; ...More ...Less
6 US10579105B2
Foldable cover and display for an electronic device
Publication/Patent Number: US10579105B2 Publication Date: 2020-03-03 Application Number: 16/408,317 Filing Date: 2019-05-09 Inventor: Jones, Christopher D.   Memering, Dale N.   Bartlow, Christopher C.   Assignee: APPLE INC.   IPC: G06F1/16 Abstract: Electronic devices including a display layer and a cover layer including a foldable region are disclosed herein. The display layer and the cover layer are configured to be moved between a folded configuration and an unfolded configuration by bending the cover layer along the foldable region. Methods of making a cover layer for an electronic device are also disclosed. Electronic devices including a display layer and a cover layer including a foldable region are disclosed herein. The display layer and the cover layer are configured to be moved between a folded configuration and an unfolded configuration by bending the cover layer along the ...More ...Less
7 US10645807B1
Component attach on metal woven mesh
Publication/Patent Number: US10645807B1 Publication Date: 2020-05-05 Application Number: 14/469,150 Filing Date: 2014-08-26 Inventor: Liu, Weifeng   Mohammed, Anwar   Kurwa, Murad   Assignee: Flextronics AP, LLC.   IPC: H05K1/03 Abstract: Methods of and devices for coupling metal woven mesh or metal woven fabric with IC components to make flexible circuits are disclosed. The flexible circuits can be used to make wearable electronic devices, such as a garment with embedded IC chip.
8 US10636583B2
Material property capacitance sensor
Publication/Patent Number: US10636583B2 Publication Date: 2020-04-28 Application Number: 15/897,094 Filing Date: 2018-02-14 Inventor: Glavicic, Michael George   Assignee: Rolls-Royce Corporation   IPC: B41J2/06 Abstract: A system may include a controller configured to cause a capacitance probe to subject a material to a first electric signal having a first frequency and determine a first capacitance of the material at the first frequency. The controller is configured to cause the capacitance probe to subject the material to a second electric signal at a second frequency and determine a second capacitance of the material at the second frequency. The material includes at least a first constituent phase and a second constituent phase. The first constituent phase and the second constituent phase have substantially similar dielectric constants at the first frequency and substantially different dielectric constants at the second frequency. The controller is further configured to determine a porosity of the material based on the first capacitance and determine a relative phase composition of the first constituent phase and the second constituent phase based on the second capacitance. A system may include a controller configured to cause a capacitance probe to subject a material to a first electric signal having a first frequency and determine a first capacitance of the material at the first frequency. The controller is configured to cause the capacitance ...More ...Less
9 US10602609B2
Flexible electrical conductor device
Publication/Patent Number: US10602609B2 Publication Date: 2020-03-24 Application Number: 14/723,589 Filing Date: 2015-05-28 Inventor: Sminia, Jelmer Douwe   Van, Der Linden Ingmar Cees Johannes   Assignee: ALT Technologies B.V.   IPC: H05K1/02 Abstract: A flexible conductor device (1) includes an electrically insulating flexible carrier substrate (2) and a printed electrical conductor (12) situated on the flexible carrier substrate. The electrical conductor is defined by at least one elongate circuit (3) which extends between opposite ends (6). The carrier substrate (2) is provided with at least an incision or cut-out (4) extending through the full thickness of the carrier substrate (2) so as to provide enhanced flexibility. A flexible conductor device (1) includes an electrically insulating flexible carrier substrate (2) and a printed electrical conductor (12) situated on the flexible carrier substrate. The electrical conductor is defined by at least one elongate circuit (3) which extends between ...More ...Less
10 US10627716B2
Photosensitive resin composition, solder resist film using said photosensitive resin composition, flexible printed circuit and image display device
Publication/Patent Number: US10627716B2 Publication Date: 2020-04-21 Application Number: 16/483,547 Filing Date: 2017-02-28 Inventor: Gondaira, Takashi   Tai, Makoto   Assignee: ARISAWA MFG. CO., LTD.   IPC: H05K1/03 Abstract: The present invention provides a photosensitive resin composition with which a dry resist film can be obtained, the dry resist film exhibiting excellent storage stability and migration resistance in thickness direction thereof. This photosensitive resin composition comprises: a photosensitive prepolymer having a carboxyl group and an ethylenically unsaturated group; a photopolymerization initiator; and a thermosetting agent. The thermosetting agent is a polycarbodiimide compound represented by formula (1), in which a carbodiimide group is protected by an amino group that dissociates at temperatures of 80° C. or greater. The polycarbodiimide compound has a weight average molecular weight of 300-3000, and a carbodiimide equivalent weight of 150-600. In formula (1), R1, R2, X1, X2, and n are as defined in the description. The present invention provides a photosensitive resin composition with which a dry resist film can be obtained, the dry resist film exhibiting excellent storage stability and migration resistance in thickness direction thereof. This photosensitive resin composition comprises: a ...More ...Less
11 US10527937B2
Liquid solder resist composition and covered-printed wiring board
Publication/Patent Number: US10527937B2 Publication Date: 2020-01-07 Application Number: 15/805,756 Filing Date: 2017-11-07 Inventor: Sakai, Yoshio   Hamada, Nobuhito   Higuchi, Michiya   Miyake, Tokuzan   Assignee: GOO CHEMICAL CO., LTD.   IPC: G03F7/031 Abstract: A liquid solder resist composition contains a carboxyl group-containing resin, a photopolymerizable compound containing at least one compound selected from a group consisting of a photopolymerizable monomer and a photopolymerizable prepolymer, a photopolymerization initiator, and a titanium dioxide. The photopolymerization initiator contains a bisacylphosphine oxide-based photopolymerization initiator, a first α-hydroxyalkyl phenone-based photopolymerization initiator that is a liquid at 25° C., and a second α-hydroxyalkyl phenone-based photopolymerization initiator that is a solid at 25° C. A liquid solder resist composition contains a carboxyl group-containing resin, a photopolymerizable compound containing at least one compound selected from a group consisting of a photopolymerizable monomer and a photopolymerizable prepolymer, a photopolymerization initiator ...More ...Less
12 US10531594B2
Method of producing a liquid cooled coldplate
Publication/Patent Number: US10531594B2 Publication Date: 2020-01-07 Application Number: 15/786,179 Filing Date: 2017-10-17 Inventor: Reeves, Matthew A.   Holland, Robert Scott   Loong, Sy-jenq   Assignee: Wieland Microcool, LLC   IPC: H01R43/00 Abstract: A liquid cooled coldplate has a tub with an inlet port and an outlet port and a plurality of pockets recessed within a top surface of the tub. Each pocket has a peripheral opening and a ledge, the ledge disposed inwardly and downwardly from the peripheral opening. The inlet port and outlet port are in fluid communication with the pocket via an inlet slot and an outlet slot. A plurality of cooling plates are each received by a pocket and recessed within the pocket. Each cooling plate comprises an electronics side for receiving electronics and enhanced side for cooling the cooling plate. The enhanced side of the cooling plate comprises a plurality of pins formed by micro deformation technology. The tub may be formed by extrusion. A liquid cooled coldplate has a tub with an inlet port and an outlet port and a plurality of pockets recessed within a top surface of the tub. Each pocket has a peripheral opening and a ledge, the ledge disposed inwardly and downwardly from the peripheral opening. The inlet port ...More ...Less
13 US10531578B2
Method for manufacturing a flexible circuit board incorporating sunken resistor
Publication/Patent Number: US10531578B2 Publication Date: 2020-01-07 Application Number: 15/881,873 Filing Date: 2018-01-29 Inventor: Yang, Mei   Liu, Yan   Assignee: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.   Avary Holding (Shenzhen) Co., Limited.   IPC: H05K3/46 Abstract: A method for manufacturing a flexible circuit board with resistor which is buried in the board includes steps of providing a composite board, the composite board comprising a substrate, and a physical development core layer formed on the substrate. A silver halide emulsion layer is formed on the physical development core layer and the silver halide emulsion layer is exposed. A developing solution is applied to the halide emulsion layer and washed to form a silver layer on the substrate. A conductive layer is formed on the silver layer and the conductive layer is etched, forming at least one opening. Such opening exposes a portion of the silver layer which contains a buried resistor. Different processes and materials applied in the above procedure serve to increase or decrease the resistance of the resistor as desired. A method for manufacturing a flexible circuit board with resistor which is buried in the board includes steps of providing a composite board, the composite board comprising a substrate, and a physical development core layer formed on the substrate. A silver halide emulsion layer ...More ...Less
14 US10553453B2
Systems and methods for semiconductor packages using photoimageable layers
Publication/Patent Number: US10553453B2 Publication Date: 2020-02-04 Application Number: 16/317,789 Filing Date: 2016-07-14 Inventor: Chavali, Sri Chaitra   Alur, Siddharth K.   Schuckman, Amanda E.   Alur, Amruthavalli Palla   Salama, Islam A.   Deng, Yikang   Darmawikarta, Kristof   Assignee: Intel Corporation   IPC: H05K1/03 Abstract: Various embodiments of the disclosure are directed to a semiconductor package and a method for fabrication of the semiconductor package. Further, disclosed herein are systems and methods that are directed to using a photoimagable dielectric (PID) layer with substantially similar mechanical properties as that of a mold material. The disclosure can be used, for example, in the context of bumpless laserless embedded substrate structures (BLESS) technology for wafer/panel level redistribution layer (RDL) and/or fan-out packaging applications. The disclosed embodiments may reduce the need for multiple dry resist film (DFR) lamination steps during various processing steps for semiconductor packaging and can also facilitate multiple layer counts due to the availability of thin PID materials. Various embodiments of the disclosure are directed to a semiconductor package and a method for fabrication of the semiconductor package. Further, disclosed herein are systems and methods that are directed to using a photoimagable dielectric (PID) layer with substantially similar ...More ...Less
15 US10548219B2
Stress relaxation substrate and textile type device
Publication/Patent Number: US10548219B2 Publication Date: 2020-01-28 Application Number: 15/768,252 Filing Date: 2016-10-14 Inventor: Nakajima, Masao   Amimori, Ichiro   Sawanobori, Osamu   Someya, Takao   Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCY   IPC: H05K1/03 Abstract: The present invention provides a stress relaxation substrate for relaxing stress generated due to differences in the hardness of a circuit substrate and a cloth body. This stress relaxation substrate is disposed between a cloth body and a circuit board having a wiring, wherein the stress relaxation substrate includes a stress relaxation layer harder than the cloth body, and softer than the circuit board, an adhesive layer provided on one surface of the stress relaxation layer, and a conductive portion provided on the stress relaxation layer to be formed between a first surface and a second surface. The present invention provides a stress relaxation substrate for relaxing stress generated due to differences in the hardness of a circuit substrate and a cloth body. This stress relaxation substrate is disposed between a cloth body and a circuit board having a wiring, wherein ...More ...Less
16 US10537021B2
Three-dimensional wiring board production method, three-dimensional wiring board, and substrate for three-dimensional wiring board
Publication/Patent Number: US10537021B2 Publication Date: 2020-01-14 Application Number: 16/229,948 Filing Date: 2018-12-21 Inventor: Michiwaki, Shigeru   Assignee: MEIKO ELECTRONICS CO., LTD.   IPC: H05K1/02 Abstract: A three-dimensional wiring board production method is provided that includes: a preparation step of preparing a resin film (1) having a breaking elongation of 50% or more; a first metal film formation step of forming a first metal film (3) on a surface of the resin film; a pattern formation step of performing patterning on the first metal film to form a desired pattern; a three-dimensional molding step of performing three-dimensional molding by heating and pressurizing the resin film; and a second metal film formation step of forming a second metal film (21) on the first metal film having a pattern formed thereon. In the first metal film formation step, metal is deposited in a particle state to form the first metal film in a porous state. A three-dimensional wiring board production method is provided that includes: a preparation step of preparing a resin film (1) having a breaking elongation of 50% or more; a first metal film formation step of forming a first metal film (3) on a surface of the resin film; a ...More ...Less